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Andres Marquez

Researcher at Pacific Northwest National Laboratory

Publications -  60
Citations -  600

Andres Marquez is an academic researcher from Pacific Northwest National Laboratory. The author has contributed to research in topics: Programming paradigm & Runtime system. The author has an hindex of 13, co-authored 56 publications receiving 545 citations. Previous affiliations of Andres Marquez include University of Delaware.

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Proceedings ArticleDOI

A design study of the EARTH multiprocessor

TL;DR: The design of EARTH (EE-cient Architecture for Running THreads), which attempts to address the above issues, is described and it is demonstrated that multithread-ing support can be eeciently implemented (with little em-ulation overhead) in a multiprocessor without a major impact on uniprocessors performance.
Proceedings ArticleDOI

Exploring and analyzing the real impact of modern on-package memory on HPC scientific kernels

TL;DR: A comprehensive evaluation for a wide spectrum of scientific kernels with a large amount of representative inputs on two Intel OPMs, guided by general optimization models, demonstrates OPM's effectiveness for easing programmers' tuning efforts to reach ideal throughput for both compute-bound and memory-bound applications.
Proceedings ArticleDOI

MIC-SVM: Designing a Highly Efficient Support Vector Machine for Advanced Modern Multi-core and Many-Core Architectures

TL;DR: In this article, the authors designed and implemented MIC-SVM, a highly efficient parallel SVM for x86 based multi-core and many-core architectures, such as the Intel Ivy Bridge CPUs and Intel Xeon Phi co-processor (MIC).
Proceedings ArticleDOI

Evaluating the potential of multithreaded platforms for irregular scientific computations

TL;DR: This study conducted a detailed evaluation of the platforms using microbenchmarks in order to gain insight into their architectural capabilities and their interaction with programming models and application software.
Journal ArticleDOI

Scaling Support Vector Machines on modern HPC platforms

TL;DR: In this paper, the authors designed and implemented MIC-SVM, a highly efficient parallel SVM for x86 based multi-core and many-core architectures, such as the Intel Ivy Bridge CPUs and Intel Xeon Phi co-processor (MIC).