Performance measurement and analysis of parallel applications is often challenging, despite many excellent commercial and open-source tools being available Currently envisaged exascale computer systems exacerbate matters by requiring extremely high scalability to effectively exploit millions of processor cores Unfortunately, significant application execution performance variability arising from increasingly complex interactions between hardware and system software makes this situation much more difficult for application developers and performance analysts alike This work considers the performance assessment of the HemeLB exascale flagship application code from the EU HPC Centre of Excellence (CoE) for Computational Biomedicine (CompBioMed) running on the SuperMUC-NG Tier-0 leadership system, using the methodology of the Performance Optimisation and Productivity (POP) CoE Although 80% scaling efficiency is maintained to over 100,000 MPI processes, disappointing initial performance with more processes and corresponding poor strong scaling was identified to originate from the same few compute nodes in multiple runs, which later system diagnostic checks found had faulty DIMMs and lacklustre performance Excluding these compute nodes from subsequent runs improved performance of executions with over 300,000 MPI processes by a factor of five, resulting in 190 x speed-up compared to 864 MPI processes While communication efficiency remains very good up to the largest scale, parallel efficiency is primarily limited by load balance found to be largely due to core-to-core and run-to-run variability from excessive stalls for memory accesses, that affect many HPC systems with Intel Xeon Scalable processors The POP methodology for this performance diagnosis is demonstrated via a detailed exposition with widely deployed `standard' measurement and analysis tools

Exascale potholes for HPC: Execution performance and variability analysis of the flagship application code HemeLB

Special Issue: Multiscale modeling of moving interfaces in materials

The Modular Supercomputing Architecture (MSA) plays a key role in Europe's Exascale computing strategy. Developed in the European project series DEEP, MSA breaks with traditional HPC architectures by integrating heterogeneous computing resources in a modular way at the system level, organizing them in compute modules with different hardware and performance characteristics. Heterogeneous applications and workflows can be run on exactly matching computing resources, therefore improving the time to solution and energy use. While mapping different code parts on the best-suited compute modules of the DEEP-EST prototype has been evaluated yet, the parallel I/O and storage environment has been neglected. Therefore, this position paper makes a first attempt to provide a complete overview and analysis of the complex I/O subsystem of the DEEP-EST prototype and IO-SEA, the main EU project addressing I/O and data management in MSA systems.

Assessment of the I/O and Storage Subsystem in Modular Supercomputing Architectures

The DEEP projects have developed a variety of hardware and software technologies aiming at improving the efficiency and usability of next generation high-performance computers. They evolve around an innovative concept for heterogeneous systems: the Cluster-Booster architecture. In it, a general purpose cluster is tightly coupled to a many-core system (the Booster). This modular way of integrating heterogeneous components enables applications to freely choose the kind of computing resources on which it runs most efficiently. Codes might even be partitioned to map specific requirements of code-parts onto the best suited hardware. This paper presents for the first time measurements done by a real world scientific application demonstrating the performance gain achieved with this kind of code-partition approach.

/pdf/application-performance-on-a-cluster-booster-system-1x8tsn3ip6.pdf

Application performance on a Cluster-Booster system

Developing Exascale Computing at JSC

The DEEP projects have developed a variety of hardware and software technologies aiming at improving the efficiency and usability of next generation high-performance computers. They evolve around an innovative concept for heterogeneous systems: the Cluster-Booster architecture. In it, a general purpose cluster is tightly coupled to a manycore system (the Booster). This modular way of integrating heterogeneous components enables applications to freely choose the kind of computing resources on which it runs most efficiently. Codes might even be partitioned to map specific requirements of code-parts onto the best suited hardware. This paper presents for the first time measurements done by a real world scientific application demonstrating the performance gain achieved with this kind of code-partition approach.

/pdf/application-performance-on-a-cluster-booster-system-2p5igtory0.pdf

Application Performance on a Cluster-Booster System

The recently completed research project DEEP-ER has developed a variety of hardware and software technologies to improve the I/O capabilities of next generation high-performance computers, and to enable applications recovering from the larger hardware failure rates expected on these machines. The heterogeneous Cluster-Booster architecture - first introduced in the predecessor DEEP project - has been extended by a multi-level memory hierarchy employing non-volatile and network-attached memory devices. Based on this hardware infrastructure, an I/O and resiliency software stack has been implemented combining and extending well established libraries and software tools, and sticking to standard user-interfaces. Real-world scientific codes have tested the projects' developments and demonstrated the improvements achieved without compromising the portability of the applications.

/pdf/the-deep-er-project-i-o-and-resiliency-extensions-for-the-4rycn1kjes.pdf

The DEEP-ER Project: I/O and Resiliency Extensions for the Cluster-Booster Architecture

The recently completed research project DEEP-ER has developed a variety of hardware and software technologies to improve the I/O capabilities of next generation high-performance computers, and to enable applications recovering from the larger hardware failure rates expected on these machines. 
The heterogeneous Cluster-Booster architecture --first introduced in the predecessor DEEP project-- has been extended by a multi-level memory hierarchy employing non-volatile and network-attached memory devices. Based on this hardware infrastructure, an I/O and resiliency software stack has been implemented combining and extending well established libraries and software tools, and sticking to standard user-interfaces. Real-world scientific codes have tested the projects' developments and demonstrated the improvements achieved without compromising the portability of the applications.

/pdf/the-deep-er-project-i-o-and-resiliency-extensions-for-the-axqjbxwgyi.pdf

Anke Kreuzer

Papers

Application Performance on a Cluster-Booster System

The DEEP-ER Project: I/O and Resiliency Extensions for the Cluster-Booster Architecture

Application performance on a Cluster-Booster system

The DEEP-ER project: I/O and resiliency extensions for the Cluster-Booster architecture