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Behnam Khaleghi
Researcher at University of California, San Diego
Publications - 60
Citations - 737
Behnam Khaleghi is an academic researcher from University of California, San Diego. The author has contributed to research in topics: Computer science & Efficient energy use. The author has an hindex of 11, co-authored 41 publications receiving 441 citations. Previous affiliations of Behnam Khaleghi include Sharif University of Technology.
Papers
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Proceedings ArticleDOI
Reliability-aware design to suppress aging
TL;DR: It is demonstrated that degradation-aware libraries and tool flows are indispensable for not only accurately estimating guardbands, but also efficiently containing them and that aging can be effectively suppressed.
Proceedings ArticleDOI
F5-HD: Fast Flexible FPGA-based Framework for Refreshing Hyperdimensional Computing
TL;DR: F5-HD eliminates the arduous task of handcrafted designing of hardware accelerators by automatically generating an FPGA implementation of HD accelerator leveraging a template of optimized processing elements, according to the applications specification and user's constraint.
Proceedings ArticleDOI
FlexiGAN: An End-to-End Solution for FPGA Acceleration of Generative Adversarial Networks
Amir Yazdanbakhsh,Michael Brzozowski,Behnam Khaleghi,Soroush Ghodrati,Kambiz Samadi,Nam Sung Kim,Nam Sung Kim,Hadi Esmaeilzadeh +7 more
TL;DR: FlexiGAN is introduced, an end-to-end solution from high-level GAN specication to an optimized synthesizable FPGA accelerator that aims to harness the benets of both MIMD and SIMD execution models and introduces a succinct set of operations that enable us to signicantly reduce the on-chip memory usage, which is generally scarce in FPGAs.
Journal ArticleDOI
FPGA-Based Protection Scheme against Hardware Trojan Horse Insertion Using Dummy Logic
TL;DR: A low-level HTH protection scheme for FPGAs by filling the unused resources with the proposed dummy logic and offering dummy logic cells for different resources, which shows the chance of logic abuse can be significantly reduced.
Proceedings ArticleDOI
RAPID: A ReRAM Processing in-Memory Architecture for DNA Sequence Alignment
TL;DR: This paper proposes a novel processing in-memory (PIM) architecture suited for DNA sequence alignment, called RAPID, and revise the state-of-the-art alignment algorithm to make it compatible with in- memory parallel computations, and process DNA data completely inside memory without requiring additional processing units.