With their working mechanisms based on ion migration, the switching dynamics and electrical behaviour of memristive devices resemble those of synapses and neurons, making these devices promising candidates for brain-inspired computing. Built into large-scale crossbar arrays to form neural networks, they perform efficient in-memory computing with massive parallelism by directly using physical laws. The dynamical interactions between artificial synapses and neurons equip the networks with both supervised and unsupervised learning capabilities. Moreover, their ability to interface with analogue signals from sensors without analogue/digital conversions reduces the processing time and energy overhead. Although numerous simulations have indicated the potential of these networks for brain-inspired computing, experimental implementation of large-scale memristive arrays is still in its infancy. This Review looks at the progress, challenges and possible solutions for efficient brain-inspired computation with memristive implementations, both as accelerators for deep learning and as building blocks for spiking neural networks.

Memristive crossbar arrays for brain-inspired computing

Guided by brain-like ‘spiking’ computational frameworks, neuromorphic computing—brain-inspired computing for machine intelligence—promises to realize artificial intelligence while reducing the energy requirements of computing platforms. This interdisciplinary field began with the implementation of silicon circuits for biological neural routines, but has evolved to encompass the hardware implementation of algorithms with spike-based encoding and event-driven representations. Here we provide an overview of the developments in neuromorphic computing for both algorithms and hardware and highlight the fundamentals of learning and hardware frameworks. We discuss the main challenges and the future prospects of neuromorphic computing, with emphasis on algorithm–hardware codesign. The authors review the advantages and future prospects of neuromorphic computing, a multidisciplinary engineering concept for energy-efficient artificial intelligence with brain-inspired functionality.

Towards spike-based machine intelligence with neuromorphic computing.

Memristor crossbars offer reconfigurable non-volatile resistance states and could remove the speed and energy efficiency bottleneck in vector-matrix multiplication, a core computing task in signal and image processing. Using such systems to multiply an analogue-voltage-amplitude-vector by an analogue-conductance-matrix at a reasonably large scale has, however, proved challenging due to difficulties in device engineering and array integration. Here we show that reconfigurable memristor crossbars composed of hafnium oxide memristors on top of metal-oxide-semiconductor transistors are capable of analogue vector-matrix multiplication with array sizes of up to 128 × 64 cells. Our output precision (5–8 bits, depending on the array size) is the result of high device yield (99.8%) and the multilevel, stable states of the memristors, while the linear device current–voltage characteristics and low wire resistance between cells leads to high accuracy. With the large memristor crossbars, we demonstrate signal processing, image compression and convolutional filtering, which are expected to be important applications in the development of the Internet of Things (IoT) and edge computing.

Analogue signal and image processing with large memristor crossbars

This comprehensive review summarizes state of the art, challenges, and prospects of the neuro-inspired computing with emerging nonvolatile memory devices. First, we discuss the demand for developing neuro-inspired architecture beyond today’s von-Neumann architecture. Second, we summarize the various approaches to designing the neuromorphic hardware (digital versus analog, spiking versus nonspiking, online training versus offline training) and discuss why emerging nonvolatile memory is attractive for implementing the synapses in the neural network. Then, we discuss the desired device characteristics of the synaptic devices (e.g., multilevel states, weight update nonlinearity/asymmetry, variation/noise), and survey a few representative material systems and device prototypes reported in the literature that show the analog conductance tuning. These candidates include phase change memory, resistive memory, ferroelectric memory, floating-gate transistors, etc. Next, we introduce the crossbar array architecture to accelerate the weighted sum and weight update operations that are commonly used in the neuro-inspired machine learning algorithms, and review the recent progresses of array-level experimental demonstrations for pattern recognition tasks. In addition, we discuss the peripheral neuron circuit design issues and present a device-circuit-algorithm codesign methodology to evaluate the impact of nonideal device effects on the system-level performance (e.g., learning accuracy). Finally, we give an outlook on the customization of the learning algorithms for efficient hardware implementation.

Neuro-Inspired Computing With Emerging Nonvolatile Memorys

Journal of Applied physics,Vol.33 : 1962年に発表されたレオロジー関連の論文

Understanding the resistive switching behavior, or the resistance change, of oxide-based memristor devices, is critical to predicting their responses with known electrical inputs. Also, with the known electrical response of a memristor, one can confirm its usefulness in non-volatile memory and/or in artificial neural networks. Although bi- or multi-layered oxides have been reported to improve the switching performance, compared to the single oxide layer, the detailed explanation about why the switching can easily be improved for some oxides combinations is still missing. Herein, we fabricated two types of bi-layered heterostructure devices, quasi-HfO$_x$/AlO$_y$ and AlO$_y$/HfO$_x$ sandwiched between Au electrodes, and their electrical responses are investigated. For a deeper understanding of the switching mechanism, the performance of a HfOx only device is also considered, which serves as a control device. The role of bi-layered heterostructures is investigated using both the experimental and simulated results. Our results suggest that synergistic switching performance can be achieved with a proper combination of these materials and/or devices. These results open the avenue for designing more efficient double- or multi-layers memristor devices for an analog response.

Quasi-HfO$_x$/ AlO$_y$ and AlO$_y$/ HfO$_x$ Based Memristor Devices: Role of Bi-layered Oxides in Digital Set and Analog Reset Switching

Understanding the resistance switching behavior of oxide-based memristive devices is critical for evaluating their usefulness in nonvolatile memory and/or in artificial neural networks. Oxide memristors often employ bi- or multilayered metal oxide thin films for improved performance compared to devices with a single-metal-oxide active layer. However, a clear understanding of the mechanisms that lead to improved performance for specific combinations of oxide thin films is still missing. Herein, we fabricated two types of bilayered heterostructure devices, with HfOx/AlOy and AlOy/HfOx bilayer films sandwiched between Au electrodes. Electrical responses of these bilayer devices reveal a digital set and an analog reset transition process. Single-layer HfOx and AlOy devices are also examined as control samples to validate the switching mechanism. The role of bilayered heterostructures is investigated using both the experimental and simulated results. Our results suggest that synergistic switching performance can be achieved with a proper combination of these materials, optimized structures, and proper test conditions. These results open the avenue for designing more efficient double- or multilayered memristive devices for an analog response. 

Asymmetric Resistive Switching of Bilayer HfOx/AlOy and AlOy/HfOx Memristors: The Oxide Layer Characteristics and Performance Optimization for Digital Set and Analog Reset Switching

28 nm high-k-metal gate ferroelectric field effect transistors based synapses- A comprehensive overview

Fixed charges at the HfO<mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" id="d1e309" altimg="si3.svg"><mml:msub><mml:mrow /><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub></mml:math>/SiO2 interface: Impact on the memory window of FeFET

Provided herein are resistive switching devices comprising a nanocomposite, an inert electrode and an active electrode. Also provided are methods for preparing and using the disclosed resistive switching devices.

Bhaswar Chakrabarti

Papers

Quasi-HfO$_x$/ AlO$_y$ and AlO$_y$/ HfO$_x$ Based Memristor Devices: Role of Bi-layered Oxides in Digital Set and Analog Reset Switching

Asymmetric Resistive Switching of Bilayer HfOx/AlOy and AlOy/HfOx Memristors: The Oxide Layer Characteristics and Performance Optimization for Digital Set and Analog Reset Switching

28 nm high-k-metal gate ferroelectric field effect transistors based synapses- A comprehensive overview

Fixed charges at the HfO<mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" id="d1e309" altimg="si3.svg"><mml:msub><mml:mrow /><mml:mrow><mml:mn>2</mml:mn></mml:mrow></mml:msub></mml:math>/SiO2 interface: Impact on the memory window of FeFET

Resistive switching memory device