In this paper, a nonlinear control strategy for controlling a dc/dc buck converter feeding a constant power load is proposed. The main objective of the proposed controller is to improve the transient performance when in presence of unknown power disturbances. A feedback controller is combined with a feedforward strategy. A nonlinear reduced order observer is used for estimating the value of the power load and its time derivative. These estimated values are fed forward to the nonlinear feedback controller whose design is based on feedback linearization method. The proposed controller is tested via simulation and experimental results.

Nonlinear Control of a Buck Converter Which Feeds a Constant Power Load

In this paper, a soft-switching bidirectional dc/dc converter with a LC series resonant circuit is proposed. The proposed converter has been obtained by adding LC series resonant tank in the conventional bidirectional dc/dc converter. The proposed topology performs soft switching at both buck and boost operations. Through the theoretical boost and buck mode analysis, zero voltage switching operation is explained. Moreover, characteristics of the proposed topology are verified with simulation and experimental results.

Soft-Switching Bidirectional DC/DC Converter with a LC Series Resonant Circuit

Granular power delivery with per-core regulation for microprocessor power delivery has the potential to significantly improve the energy efficiency of future data centers. On-chip switched capacitor converters can enable such granular power delivery with per-core regulation given a high efficiency, high power density, fast response time, and high output power converter design. This paper details the implementation of an on-chip switched capacitor voltage regulator in a $32\,\mathrm{n}\mathrm{m}$ SOI CMOS technology with deep trench capacitors. A novel feedforward control for reconfigurable switched capacitor converters is presented. The feedforward control reduces the output voltage droop following a transient load step. This leads to a reduced minimum microprocessor supply voltage, thereby reducing the overall power consumption of the microprocessor. The implemented on-chip switched capacitor voltage regulator provides a $0.7-1.1$ V output voltage from $1.8$ V input. It achieves a $85.1\%$ maximum efficiency at $3.2\,\mathrm{W}\mathrm{/}\mathrm{m}\mathrm{m}^2$ power density, a subnanosecond response time with improved minimum supply voltage capability, and a maximum output power of $10\,\mathrm{W}$ . For an output voltage of $850\,\mathrm{m}\mathrm{V}$ , the feedforward control reduces the required voltage overhead by $60\,\mathrm{m}\mathrm{V}$ for a transient load step from $10\%$ to $100\%$ of the nominal load. This can reduce the overall power consumption of the microprocessor by $7\%$ .

A 10 W On-Chip Switched Capacitor Voltage Regulator With Feedforward Regulation Capability for Granular Microprocessor Power Delivery

A high-efficiency boost dc-dc converter with adaptive peak-inductor-current (APIC) control method is proposed. Besides, a novel two-step startup procedure is also proposed and applied on the boost converter. The proposed integrated boost converter was fabricated by using a 0.18-μm 1P6M mixed-signal process with a die area of 0.96 mm × 0.75 mm, and it is meant to be used with low-power, low-voltage green energy sources and batteries, such as fuel cells, solar cells, and nickel-metal hydride batteries. Hence, the power efficiency, minimal startup voltage, and minimal input voltage are the most important design considerations. The output voltage of the proposed converter is set to 1.8V, and the measured power efficiency is up to 90.6%, occurring when the input voltage is 1.3 V, the output voltage is 1.8 V, and the load current is 50 mA. According to the measured results, the proposed converter can start up successfully with a 0.43-V input voltage. Then, the input voltage can be further lowered to 0.22 V after startup. Moreover, both the efficiency and the output voltage ripple are improved with the proposed APIC method. Furthermore, a two-step startup procedure, which does not require any extra startup assist circuit, is proposed.

Adaptive Peak-Inductor-Current-Controlled PFM Boost Converter With a Near-Threshold Startup Voltage and High Efficiency

Fully integrated buck converters are typically operated with a second-order LC low-pass filter and a switching frequency beyond 100 MHz. The motivation for such design choices is to reduce the size of passive components in the LC low-pass filter required for small output voltage ripple. However, in a buck converter with on-chip planar spiral inductors, a fourth-order filter can deliver better performance characteristics without area penalty. This paper presents a comparative study of a fourth-order LC low-pass filter versus a second-order LC low-pass filter with on-chip planar spiral inductors and on-chip capacitors. A fully integrated buck converter is then designed with a quasi-V
 2
 controller to demonstrate the benefits of a fourth-order LC low-pass filter. The prototype chip, which is implemented in a 65-nm CMOS process, produces a nominal voltage of 0.7 V from a 1-V supply. The fourth-order LC low-pass filter uses a total inductance of 1.8 nH and a total capacitance of 4 nF. Measurement results demonstrate fast transient response on the order of nanoseconds. A peak efficiency of 76.1% is achieved, and the output voltage ripple is kept below 15 mV over the entire range of load current from 40 to 180 mA.

Fully Integrated Buck Converter With Fourth-Order Low-Pass Filter

A novel pulse frequency modulation step-up dc-dc converter with maximum power conversion of 9191% and steady-state accuracy of 033% is presented in this letter The high efficiency and exact output are achieved by a dynamic stored energy technique that enhances utility rate of energy with less power consumption This technique uses a dynamic sensing current controller and a load current detector that accurately generates different energy according to various load conditions The boost converter has been designed and fabricated with a standard TSMC 33/5 V 035- mum 2P4M CMOS technology Experimental results show that the output up-ripple voltage variation was 25 mV (61-86 mV), whereas its fixed energy counterpart was 394 mV (86-48 mV) The proposed boost converter has 16% higher power conversion efficiency than the conventional fixed energy technique at 1 mA load current

An Exact Current-Mode PFM Boost Converter With Dynamic Stored Energy Technique

This paper presents a high-efficiency PWM DC-DC buck converter with a novel discontinuous-conduction mode (DCM) control under light-load condition. It is designed by using TSMC 1.8/3.3V 0.18µm CMOS technology. The proposed PWM buck converter with DCM operation not only can reach high efficiency in heavy-load (over 95% at 100mA loading), but also has great improvement in light-load efficiency (36.14% higher than the conventional PWM converter at 10mA loading) without using any PFM techniques. The output accuracy and the output ripples are better than PFM converters under light-load, and as good as a normal PWM converter under heavy-load. The proposed PWM converter is designed at 1.8V supply and 1V output voltage, and the maximum output power is 500mW.

A high-efficiency PWM DC-DC buck converter with a novel DCM control under light-load

This paper presents a two-phase fully-integrated dc–dc converter for system-in-package systems with passive components fabricated using a glass-substrate-integrated passive device (GIPD) process. The proposed self-adaptive discontinuous conduction mode (DCM) controller and low-swing/full-swing buffer were incorporated to reduce the switching loss and maintain high efficiency at high switching frequency. A secondary phase and phase controller were added to increase the output power and reduce the output ripple. The proposed GIPD solution packages a standard complementary metal–oxide–semiconductor process and GIPD process in 3-D format to reduce the footprint of the system. The proposed self-adaptive DCM controller and low-swing/full-swing buffer improve efficiency of 15% in measurement compared to our previous work on the GIPD process in simulation. The peak efficiency of the proposed converter was 79.09% at a 400-mA load current, 5% higher than the peak efficiency presented in previous study. The maximal output power could reach 720 mW and the maximal switching frequency ( $f_{{\rm CCM}}$ ) was designed to be 70 MHz (measured at 50 MHz) with only two 6-nH inductors and one 15-nF capacitor.

A Two-Phase Fully-Integrated DC–DC Converter With Self-Adaptive DCM Control and GIPD Passive Components

This paper presents a high-speed DC-DC converter with light-load improvement circuit using TSMC 0.18µm CMOS process. The proposed DC-DC converter has over 80% efficiency and very fast transient response about 280ns. The maximum loading is 300mA and the required passive components are all at nano-meter level. The high-efficiency DC-DC converter not only can be used in portable electronic devices, but also in tiny wireless sensor nodes because it only needs nano-level passives. To achieve using these small components, the switching frequency must be high enough to reduce the output ripple, but the efficiency will decrease seriously. The light-load improvement circuit effectively improve the efficiency under 40MHz switching frequency and makes this converter have 15% greater efficiency than an ideal linear low-dropout regulator (LDO). This paper also uses a high-bandwidth current sensor to monitor the current through inductor so that the light-load improvement circuit can change the switching frequency by receiving the signal from the current sensor.

A high-speed converter with light-load improvement circuit and transient detector

This study utilizes a new adaptive sense current controller to get an accurate power supply. The proposed controller effectively reduces output ripple voltage of converters operated over the load current range. This reduction is realized using an adaptive sense current circuit that automatically adjusts the inductor current according to operational conditions. The proposed boost converter is designed and fabricated with a standard TSMC 3.3/5V 0.35-µm 2P4M CMOS technology. The experimental results show that the power-conversion efficiency of the proposed boost converter is 2-5% higher than that of the conventional converter with a current-limited circuit. The proposed circuit greatly reduces (i.e. by 76%) output ripple voltage compared with the conventional circuit at a 10mA loading current.

Chu-Hsiang Chia

Papers

An Exact Current-Mode PFM Boost Converter With Dynamic Stored Energy Technique

A high-efficiency PWM DC-DC buck converter with a novel DCM control under light-load

A Two-Phase Fully-Integrated DC–DC Converter With Self-Adaptive DCM Control and GIPD Passive Components

A high-speed converter with light-load improvement circuit and transient detector

Adaptive Sense Current Control for DC-DC Boost Converters to Get Accurate Voltage