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Chuliang Weng
Researcher at Huawei
Publications - 5
Citations - 146
Chuliang Weng is an academic researcher from Huawei. The author has contributed to research in topics: Computer memory & Computing with Memory. The author has an hindex of 5, co-authored 5 publications receiving 132 citations.
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Journal ArticleDOI
An Energy-Efficient Nonvolatile In-Memory Computing Architecture for Extreme Learning Machine by Domain-Wall Nanowire Devices
TL;DR: It is shown that all operations involved in machine learning on neural network can be mapped to a logic-in-memory architecture by nonvolatile domain-wall nanowire, which significantly alleviates the bandwidth congestion issue and improves the energy efficiency.
Proceedings ArticleDOI
An energy-efficient matrix multiplication accelerator by distributed in-memory computing on binary RRAM crossbar
TL;DR: Based on numerical results for fingerprint matching that is mapped on the proposed RRAM-crossbar, the proposed architecture has shown 2.86x faster speed, 154x better energy efficiency, and 100x smaller area when compared to the same design by CMOS-based ASIC.
Proceedings ArticleDOI
Energy efficient in-memory machine learning for data intensive image-processing by non-volatile domain-wall memory
TL;DR: It is shown that all operations involved in machine learning on neural network can be mapped to a logic-in-memory architecture by non-volatile domain-wall nanowire, called DW-NN.
Proceedings ArticleDOI
Optimizing Boolean embedding matrix for compressive sensing in RRAM crossbar
TL;DR: The numerical experiments demonstrate that the proposed optimized Boolean embedding on RRAM crossbar exhibits 10x faster speed, 17x better energy efficiency, and three orders of magnitude smaller area with slight accuracy penalty, when compared to the optimized real-valuedembedding on CMOS ASIC platform.
Proceedings ArticleDOI
An energy-efficient non-volatile in-memory accelerator for sparse-representation based face recognition
TL;DR: By projecting high-dimension image data to much lower dimension, the current scaling for STT-MRAM write operation can be applied aggressively, which leads to significant power reduction yet maintains quality-of-service for face recognition.