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Cooper S. Levy

Researcher at University of California, San Diego

Publications -  16
Citations -  298

Cooper S. Levy is an academic researcher from University of California, San Diego. The author has contributed to research in topics: Amplifier & RF power amplifier. The author has an hindex of 7, co-authored 15 publications receiving 206 citations.

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A Class-G Voltage-Mode Doherty Power Amplifier

TL;DR: This paper presents the combination of two back-off efficiency enhancement techniques, the voltage-mode Doherty and the class-G switched-capacitor power amplifier (PA), to achieve efficiency peaking at both 6 and 12 dB back off without introducing the mode-switching glitches present in previous architectures.
Journal ArticleDOI

Voltage Mode Doherty Power Amplifier

TL;DR: A new wideband Doherty amplifier technique that can achieve high efficiency while maintaining excellent linearity is presented that is realized with two voltage mode power amplifiers and transformers, thus eliminating a narrowband impedance inverter.
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Improved Performance of Zinc Oxide Thin Film Transistor Pressure Sensors and a Demonstration of a Commercial Chip Compatibility with the New Force Sensing Technology

TL;DR: In this article, a 16 × 16 pressure sensor arrays on thin bendable glass substrates for integrated low weight and flexible touchscreen displays is fabricated and demonstrated and read-out electronics to interface with the arrays and to record their response in real-time are developed.
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Supply-Scaling for Efficiency Enhancement in Distributed Power Amplifiers

TL;DR: A supply-scaling technique to improve the efficiency of a mm-wave DA while maintaining a broadband $50\Omega $ match is presented and an analysis of interstage load modulation and the effects of shunt dc-feed inductors on distributed operation is provided.
Journal ArticleDOI

RF Watt-Level Low-Insertion-Loss High-Bandwidth SOI CMOS Switches

TL;DR: The cause of compression in a FET switch is investigated, and the analysis suggests the optimization of the gate driving impedance for a stacked-FET switch to realize watt-level power handling with high fractional bandwidth (FBW).