CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.

CMOS image sensors: electronic camera-on-a-chip

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

/pdf/active-pixel-sensor-with-intra-pixel-charge-transfer-387ug1605r.pdf

Active pixel sensor with intra-pixel charge transfer

CMOS image sensors: Electronic camera-on-a-chip

A forward-facing vision system for a vehicle includes a forward-facing camera disposed in a windshield electronics module attached at a windshield of the vehicle and viewing through the windshield. A control includes a processor that, responsive to processing of captured image data, detects taillights of leading vehicles during nighttime conditions and, responsive to processing of captured image data, detects lane markers on a road being traveled by the vehicle. The control, responsive to lane marker detection and a determination that the vehicle is drifting out of a traffic lane, may control a steering system of the vehicle to mitigate such drifting, with the steering system manually controllable by a driver of the vehicle irrespective of control by the control. The processor, based at least in part on detection of lane markers via processing of captured image data, determines curvature of the road being traveled by the vehicle.

Vision system for vehicle

http://eia.udg.es/%7Eqsalvi/papers/2006-MJ.pdf

Review of CMOS image sensors

A family of CMOS-based active pixel image sensors (APSs) that are inherently compatible with the integration of on-chip signal processing circuitry is reported. The image sensors were fabricated using commercially available 2-/spl mu/m CMOS processes and both p-well and n-well implementations were explored. The arrays feature random access, 5-V operation and transistor-transistor logic (TTL) compatible control signals. Methods of on-chip suppression of fixed pattern noise to less than 0.1% saturation are demonstrated. The baseline design achieved a pixel size of 40 /spl mu/m/spl times/40 /spl mu/m with 26% fill-factor. Array sizes of 28/spl times/28 elements and 128/spl times/128 elements have been fabricated and characterized. Typical output conversion gain is 3.7 /spl mu/V/e/sup -/ for the p-well devices and 6.5 /spl mu/V/e/sup -/ for the n-well devices. Input referred read noise of 28 e/sup -/ rms corresponding to a dynamic range of 76 dB was achieved. Characterization of various photogate pixel designs and a photodiode design is reported. Photoresponse variations for different pixel designs are discussed.

CMOS active pixel image sensors for highly integrated imaging systems

A CMOS imaging sensor is described that uses active pixel sensor (APS) technology and permits the integration of the detector array with on-chip timing, control, and signal chain electronics. This sensor technology has been used to implement a CMOS APS camera-on-a-chip. The camera-on-a-chip features a 256/spl times/256 APS sensor integrated on a CMOS chip with the timing and control circuits, and signal-conditioning to enable random-access, low power (/spl sim/5 mW) operation, and low read noise (13 e/sup -/ rms). The chip features simple power supplies, fast readout rates, and a digital interface for commanding the sensor, as well as for programming the window-of-interest readout and exposure times. Excellent imaging has been demonstrated with the APS camera-on-a-chip, and the measured performance indicates that this technology will be competitive with charge-coupled devices (CCD's) in many applications.

256/spl times/256 CMOS active pixel sensor camera-on-a-chip

A 64/spl times/64 element CMOS active pixel sensor (APS) for star tracker applications is reported. The chip features an innovative regional electronic shutter through the use of an individual pixel reset architecture. Using the regional electronic shutter, each star in the field of view can have its own integration period. This way, simultaneous capture of bright stars with dim stars is accommodated, enabling a large increase in tracker capability. The chip achieves 80 dB dynamic range, 50 e-rms read noise, low dark current, and excellent electronic shutter linearity.

CMOS active pixel sensor star tracker with regional electronic shutter

A monolithic semiconductor imager includes an indium-based III-V compound semiconductor monolithic active layer of a first conductivity type, an array of plural focal plane cells on the active layer, each of the focal plane cells including a photogate over a top surface of the active layer, a readout circuit dedicated to the focal plane cell including plural transistors formed monolithically with the monolithic active layer and a single-stage charge coupled device formed monolithically with the active layer between the photogate and the readout circuit for transferring photo-generated charge accumulated beneath the photogate during an integration period to the readout circuit. The photogate includes thin epitaxial semiconductor layer of a second conductivity type overlying the active layer and an aperture electrode overlying a peripheral portion of the thin epitaxial semiconductor layer, the aperture electrode being connectable to a photogate bias voltage.

/pdf/monolithic-in-based-iii-v-compound-semiconductor-focal-plane-1cypzzd4gn.pdf

Monolithic in-based III-V compound semiconductor focal plane array cell with single stage CCD output

A 128/spl times/128 photo-diode active pixel sensor (APS) with an on-chip array sequencing controller and 1b thresholding circuitry processes 8,192-frames/s at a 128 Mb data rate onto a 8 b wide parallel-digital output port. In addition, the on-chip controller can be commanded to output data through either a serial digital port for lower bandwidth requirements or through a serial analog port for higher-resolution off-chip analog-to-digital conversion.

Craig Staller

Papers

CMOS active pixel image sensors for highly integrated imaging systems

256/spl times/256 CMOS active pixel sensor camera-on-a-chip

CMOS active pixel sensor star tracker with regional electronic shutter

Monolithic in-based III-V compound semiconductor focal plane array cell with single stage CCD output

128 Mb/s multiport CMOS binary active-pixel image sensor