D
Dongsuk Jeon
Researcher at Seoul National University
Publications - 38
Citations - 909
Dongsuk Jeon is an academic researcher from Seoul National University. The author has contributed to research in topics: CMOS & Efficient energy use. The author has an hindex of 16, co-authored 37 publications receiving 676 citations. Previous affiliations of Dongsuk Jeon include Massachusetts Institute of Technology & University of Michigan.
Papers
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Journal ArticleDOI
An Injectable 64 nW ECG Mixed-Signal SoC in 65 nm for Arrhythmia Monitoring
Yen-Po Chen,Dongsuk Jeon,Yoonmyung Lee,Yejoong Kim,Zhiyoong Foo,Inhee Lee,Nicholas B. Langhals,Grant H. Kruger,Hakan Oral,Omer Berenfeld,Zhengya Zhang,David Blaauw,Dennis Sylvester +12 more
TL;DR: A syringe-implantable electrocardiography (ECG) monitoring system is proposed that successfully detecting atrial fibrillation arrhythmia and storing the irregular waveform in memory in experiments using an ECG simulator, a live sheep, and an isolated sheep heart.
Journal ArticleDOI
A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS
TL;DR: The first method increases the number of pipeline stages compared to conventional ultra low voltage pipelining strategies, reducing the leakage/dynamic energy ratio and simultaneously improving performance and energy efficiency, and introduces a parallel-pipelined architecture that suppresses leakage energy by ensuring full utilization of functional units and reduces memory size.
Proceedings ArticleDOI
24.3 An implantable 64nW ECG-monitoring mixed-signal SoC for arrhythmia diagnosis
Dongsuk Jeon,Yen-Po Chen,Yoonmyung Lee,Yejoong Kim,Zhiyoong Foo,Grant H. Kruger,Hakan Oral,Omer Berenfeld,Zhengya Zhang,David Blaauw,Dennis Sylvester +10 more
TL;DR: As in other implantable systems, low power consumption is a critical factor; in this case to provide a sufficiently long operating time between wireless recharge events.
Proceedings ArticleDOI
7.6 A 65nm 236.5nJ/Classification Neuromorphic Processor with 7.5% Energy Overhead On-Chip Learning Using Direct Spike-Only Feedback
TL;DR: On-chip training of inference engines for neural network and machine learning algorithms shows that on- chip training could serve practical purposes such as compensating for process variations of in-memory computing or adapting to changing environments in real time.
Proceedings ArticleDOI
A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining
TL;DR: This paper uses circuit and architectural methods to further reduce the minimum energy point, or Emin, and establish a new lower limit on energy efficiency, while simultaneously improving performance and robustness.