E
Etienne Menard
Researcher at Durham University
Publications - 25
Citations - 837
Etienne Menard is an academic researcher from Durham University. The author has contributed to research in topics: Substrate (printing) & Layer (electronics). The author has an hindex of 8, co-authored 24 publications receiving 827 citations. Previous affiliations of Etienne Menard include University of Illinois at Urbana–Champaign & Centre national de la recherche scientifique.
Papers
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Journal ArticleDOI
Stamp collapse in soft lithography.
Yonggang Huang,W. Zhou,Kuen J. Hsia,Etienne Menard,Etienne Menard,Jang Ung Park,John A. Rogers,Andrew G. Alleyne +7 more
TL;DR: A scaling law among the stamp modulus, punch height and spacing, and work of adhesion between the stamp and substrate is established, which leads to a simple criterion against the unwanted roof collapse.
Journal ArticleDOI
Spin on dopants for high-performance single-crystal silicon transistors on flexible plastic substrates
TL;DR: In this paper, the authors present simple approaches for fabricating collections of these elements, which they refer to as microstructured silicon (μs-Si), and for using spin-on dopants to introduce doped regions in them.
Journal ArticleDOI
Nanoscale Surface Morphology and Rectifying Behavior of a Bulk Single‐Crystal Organic Semiconductor
Etienne Menard,Alexandr Marchenko,Vitaly Podzorov,Michael Gershenson,Denis Fichou,John A. Rogers +5 more
TL;DR: The field effect transistor provides an important tool to explore the transport of field-induced charge carriers at the surface of organic semiconductors as discussed by the authors, however, special care must be taken during device fabrication to avoid degradation of the critical interface between the semiconductor and the dielectric.
Patent
High-Yield Fabrication of Large-Format Substrates with Distributed, Independent Control Elements
TL;DR: In this article, a large-format substrate with distributed control elements is formed by providing a substrate and a wafer, the wafer having a plurality of separate, independent chiplets formed thereon.
Patent
Structures and methods for testing printable integrated circuits
TL;DR: In this article, a substrate includes an anchor area (30) physically secured to a surface of the substrate and at least one printable electronic component (20), which is suspended over the surface by electrically conductive breakable tethers (40).