E
Eugenio Culurciello
Researcher at Purdue University
Publications - 156
Citations - 9252
Eugenio Culurciello is an academic researcher from Purdue University. The author has contributed to research in topics: Silicon on sapphire & CMOS. The author has an hindex of 41, co-authored 154 publications receiving 7569 citations. Previous affiliations of Eugenio Culurciello include Johns Hopkins University & Yale University.
Papers
More filters
Posted Content
ENet: A Deep Neural Network Architecture for Real-Time Semantic Segmentation
TL;DR: A novel deep neural network architecture named ENet (efficient neural network), created specifically for tasks requiring low latency operation, which is up to 18 times faster, requires 75% less FLOPs, has 79% less parameters, and provides similar or better accuracy to existing models.
Proceedings ArticleDOI
LinkNet: Exploiting encoder representations for efficient semantic segmentation
TL;DR: In this paper, the authors proposed a novel deep neural network architecture which allows it to learn without any significant increase in number of parameters and achieves state-of-the-art performance on CamVid and Cityscapes dataset.
Posted Content
An Analysis of Deep Neural Network Models for Practical Applications
TL;DR: This work presents a comprehensive analysis of important metrics in practical applications: accuracy, memory footprint, parameters, operations count, inference time and power consumption and believes it provides a compelling set of information that helps design and engineer efficient DNNs.
Proceedings ArticleDOI
NeuFlow: A runtime reconfigurable dataflow processor for vision
TL;DR: A scalable dataflow hardware architecture optimized for the computation of general-purpose vision algorithms — neuFlow — and a dataflow compiler — luaFlow — that transforms high-level flow-graph representations of these algorithms into machine code for neu Flow are presented.
Journal ArticleDOI
A biomorphic digital image sensor
TL;DR: In this article, an Arbitrated address-event imager was designed and fabricated in a 0.6-/spl mu/m CMOS process, which is composed of 80 /spl times/ 60 pixels of 32 /spltimes/ 30 /spl m/m. Tests conducted on the imager showed a large output dynamic range of 180 dB (under bright local illumination) for an individual pixel.