2005년 대한 생화학·분자생물학회 하계학술대회를 다녀와서

여성사 쓰기의 가능성과 현주소, 한국여성연구소 여성사연구실 지음, 청년사 1999

Author(s): Bonnassieux, Y; Brabec, CJ; Cao, Y; Carmichael, TB; Chabinyc, ML; Cheng, KT; Cho, G; Chung, A; Cobb, CL; Distler, A; Egelhaaf, HJ; Grau, G; Guo, X; Haghiashtiani, G; Huang, TC; Hussain, MM; Iniguez, B; Lee, TM; Li, L; Ma, Y; Ma, D; McAlpine, MC; Ng, TN; Osterbacka, R; Patel, SN; Peng, J; Peng, H; Rivnay, J; Shao, L; Steingart, D; Street, RA; Subramanian, V; Torsi, L; Wu, Y | Abstract: This roadmap includes the perspectives and visions of leading researchers in the key areas of flexible and printable electronics. The covered topics are broadly organized by the device technologies (sections 1–9), fabrication techniques (sections 10–12), and design and modeling approaches (sections 13 and 14) essential to the future development of new applications leveraging flexible electronics (FE). The interdisciplinary nature of this field involves everything from fundamental scientific discoveries to engineering challenges; from design and synthesis of new materials via novel device design to modelling and digital manufacturing of integrated systems. As such, this roadmap aims to serve as a resource on the current status and future challenges in the areas covered by the roadmap and to highlight the breadth and wide-ranging opportunities made available by FE technologies.

/pdf/the-2021-flexible-and-printed-electronics-roadmap-2nm0z1alhp.pdf

The 2021 flexible and printed electronics roadmap

Printed electrolyte-gated oxide electronics is an emerging electronic technology in the low voltage regime (≤1 V). Whereas in the past mainly dielectrics have been used for gating the transistors, many recent approaches employ the advantages of solution processable, solid polymer electrolytes, or ion gels that provide high gate capacitances produced by a Helmholtz double layer, allowing for low-voltage operation. Herein, with special focus on work performed at KIT recent advances in building electronic circuits based on indium oxide, n-type electrolyte-gated field-effect transistors (EGFETs) are reviewed. When integrated into ring oscillator circuits a digital performance ranging from 250 Hz at 1 V up to 1 kHz is achieved. Sequential circuits such as memory cells are also demonstrated. More complex circuits are feasible but remain challenging also because of the high variability of the printed devices. However, the device inherent variability can be even exploited in security circuits such as physically unclonable functions (PUFs), which output a reliable and unique, device specific, digital response signal. As an overall advantage of the technology all the presented circuits can operate at very low supply voltages (0.6 V), which is crucial for low-power printed electronics applications.

/pdf/progress-report-on-from-printed-electrolyte-gated-metal-1jttnpn819.pdf

Progress Report on "From Printed Electrolyte-Gated Metal-Oxide Devices to Circuits".

In the domain of printed electronics (PE), field-effect transistors (FETs) with an oxide semiconductor channel are very promising. In particular, the use of high gate-capacitance of the composite solid polymer electrolytes (CSPEs) as a gate-insulator ensures extremely low voltage requirements. Besides high gate capacitance, such CSPEs are proven to be easily printable, stable in air over wide temperature ranges, and possess high ion conductivity. These CSPEs can be sensitive to moisture, especially for high surface-to-volume ratio printed thin films. In this paper, we provide a comprehensive experimental study on the effect of humidity on CSPE-gated single transistors. At the circuit level, the performance of ring oscillators (ROs) has been compared for various humidity conditions. The experimental results of the electrolyte-gated FETs (EGFETs) demonstrate rather comparable currents between 30%–90% humidity levels. However, the shifted transistor parameters lead to a significant performance change of the RO frequency behavior. The study in this paper shows the need of an impermeable encapsulation for the CSPE-gated FETs to ensure identical performance at all humidity conditions.

Influence of Humidity on the Performance of Composite Polymer Electrolyte-Gated Field-Effect Transistors and Circuits

A printed electronics technology has the advantage of additive and extremely low-cost fabrication compared with the conventional silicon technology. Specifically, printed electrolyte-gated field-effect transistors (EGFETs) are attractive for low-cost applications in the Internet-of-Things domain as they can operate at low supply voltages. In this paper, we propose an empirical dc model for EGFETs, which can describe the behavior of the EGFETs smoothly and accurately over all regimes. The proposed model, built by extending the Enz–Krummenacher–Vittoz model, can also be used to model process variations, which was not possible previously due to fixed parameters for near threshold regime. It offers a single model for all the operating regions of the transistors with only one equation for the drain current. Additionally, it models the transistors with a less number of parameters but higher accuracy compared with existing techniques. Measurement results from several fabricated EGFETs confirm that the proposed model can predict the ${I}$ – ${V}$ more accurately compared with the state-of-the-art models in all operating regions. Additionally, the measurements on the frequency of a fabricated ring oscillator are only 4.7% different from the simulation results based on the proposed model using values for the switching capacitances extracted from measurement data, which shows more than $\textsf {2}\times $ improvement compared with the state-of-the-art model.

A Smooth EKV-Based DC Model for Accurate Simulation of Printed Transistors and Their Process Variations

Electrolyte-gated field-effect transistor technology is an attractive candidate for printed low-power electronics due to its high field-effect mobility and extremely low-voltage operation. Relying on an additive process, inkjet-printed devices display large process variations due to ink-substrate interactions, sensitivity to environmental conditions, such as temperature and humidity, as well as intrinsic variations of the ink. All of these sources of variations may display themselves in non-Gaussian distributions as suggested by our experiments. In this paper, we therefore propose a generic methodology for variability modeling of printed transistors, based on the Gaussian mixture model, which can be used to model any arbitrary distribution of the transistor model parameters. The proposed methodology was tested on two different data sets and has been used to predict the behavior of a measured printed security circuit as well as transistor dc characteristics.

Variability Modeling for Printed Inorganic Electrolyte-Gated Transistors and Circuits

Printed electronics offers certain technological advantages over its silicon based counterparts, such as mechanical flexibility, low process temperatures, maskless and additive manufacturing process, leading to extremely low cost manufacturing. However, to be exploited in applications such as smart sensors, Internet of Things and wearables, it is essential that the printed devices operate at low supply voltages. Electrolyte gated field effect transistors (EGFETs) using solution-processed inorganic materials which are fully printed using inkjet printers at low temperatures are very promising candidates to provide such solutions. In this paper, we discuss the technology, process, modeling, fabrication, and design aspect of circuits based on EGFETs. We show how the measurements performed in the lab can accurately be modeled in order to be integrated in the design automation tool flow in the form of a Process Design Kit (PDK). We also review some of the remaining challenges in this technology and discuss our future directions to address them.

From silicon to printed electronics: a coherent modeling and design flow approach based on printed electrolyte gated FETs

Printed electronics holds the promise of meeting the cost and conformality needs of emerging disposable and ultra-low cost margin applications. Recent printed circuits technologies also have low supply voltage and can, therefore, be battery-powered. In this paper, we explore the design space of microprocessors implemented in such printing technologies - these printed microprocessors will be needed for battery-powered applications with requirements of low cost, conformality, and programmability. To enable this design space exploration, we first present the standard cell libraries for EGFET and CNT-TFT printed technologies - to the best of our knowledge, these are the first synthesis and physical design ready standard cell libraries for any low voltage printing technology. We then present an area, power, and delay characterization of several off-the-shelf low gate count microprocessors (Z80, light8080, ZPU, and openMSP430) in EGFET and CNT-TFT technologies. Our characterization shows that several printing applications can be feasibly targeted by battery-powered printed microprocessors. However, our results also show the need to significantly reduce area and power of such printed microprocessors. We perform a design space exploration of printed microprocessor architectures over multiple parameters - datawidths, pipeline depth, etc. We show that the best cores outperform pre-existing cores by at least one order of magnitude in terms of power and area. Finally, we show that printing-specific architectural and low-level optimizations further improve area and power characteristics of low voltage battery-compatible printed microprocessors. Program-specific ISA, for example, improves power, and area by up to 4.18x and 1.93x respectively. Crosspoint-based instruction ROM outperforms a RAM-based design by 5.77x, 16.8x, and 2.42x respectively in terms of power, area, and delay.

Printed microprocessors

Printed Electronics is perceived to have a major impact in the fields of smart sensors, Internet of Things and wearables. Especially low power printed technologies such as electrolyte gated field effect transistors (EGFETs) using solution-processed inorganic materials and inkjet printing are very promising in such application domains. In this paper, we discuss a modeling approach to describe the variations of printed devices. Incorporating these models and design flows into our previously developed printed design system allows for robust circuit design. Additionally, we propose a reliability-aware routing solution for printed electronics technology based on the technology constraints in printing crossovers. The proposed methodology was validated on multiple benchmark circuits and can be easily integrated with the design automation tools-set.

Farhan Rasheed

Papers

A Smooth EKV-Based DC Model for Accurate Simulation of Printed Transistors and Their Process Variations

Variability Modeling for Printed Inorganic Electrolyte-Gated Transistors and Circuits

From silicon to printed electronics: a coherent modeling and design flow approach based on printed electrolyte gated FETs

Printed microprocessors

Predictive Modeling and Design Automation of Inorganic Printed Electronics