Gallium nitride (GaN) power devices are an emerging technology that have only recently become available commercially. This new technology enables the design of converters at higher frequencies and efficiencies than those achievable with conventional Si devices. This paper reviews the characteristics and commercial status of both vertical and lateral GaN power devices, providing the background necessary to understand the significance of these recent developments. In addition, the challenges encountered in GaN-based converter design are considered, such as the consequences of faster switching on gate driver design and board layout. Other issues include the unique reverse conduction behavior, dynamic $R_{\mathrm {{ds}},\mathrm {{on}}}$ , breakdown mechanisms, thermal design, device availability, and reliability qualification. This review will help prepare the reader to effectively design GaN-based converters, as these devices become increasingly available on a commercial scale.

Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges

Capacitive power transfer (CPT) technology is an effective and important alternative to the conventional inductive power transfer (IPT). It utilizes high-frequency electric fields to transfer electric power, which has three distinguishing advantages: negligible eddy-current loss, relatively low cost and weight, and excellent misalignment performance. In recent years, the power level and efficiency of CPT systems has been significantly improved and has reached the power level suitable for electric vehicle charging applications. This paper reviews the latest developments in CPT technology, focusing on two key technologies: the compensation circuit topology and the capacitive coupler structure. The comparison with the IPT system and some critical issues in practical applications are also discussed. Based on these analyses, the future research direction can be developed and the applications of the CPT technology can be promoted.

https://www.mdpi.com/1996-1073/10/11/1752/pdf

A Review on the Recent Development of Capacitive Wireless Power Transfer Technology

This paper proposes a double-sided LC -compensation circuit for a loosely coupled, long-distance capacitive power transfer (CPT) system. A CPT system usually contains two pairs of metal plates as the capacitive coupler. An LC -compensation circuit resonates with the coupler to generate high voltages, and corresponding electric fields, to transfer power. When the compensation circuit is used on both the primary and secondary sides, it results in a double-sided LC -compensated CPT system. The working principle and frequency properties of the CPT system are analyzed. The results show a similarity with the series–series-compensated inductive power transfer system, which has both constant-voltage (CV) and constant-current (CC) working modes. LC -compensation is also compared with LCLC -compensation in terms of power, frequency properties, and output efficiency. A 150-W double-sided LC -compensated CPT prototype is designed and implemented to demonstrate a loosely coupled CPT system with 2.16% coupling coefficient. For both CC and CV working modes, the experimental results achieve dc–dc efficiencies higher than 70% across an air-gap distance of 180 mm with a switching frequency of 1.5 MHz.

A Double-Sided LC-Compensation Circuit for Loosely Coupled Capacitive Power Transfer

Normally-off GaN-on-Si heterojunction field-effect transistors (HFETs) have been developed with up to 650 V blocking capability, fast switching, and low conduction losses in commercial devices. The natively depletion-mode device can be modified to be normally-off using a variety of techniques. For a power electronics engineer accustomed to Si-based converter design, there is inherent benefit to understanding the unique characteristics and challenges that distinguish GaN HFETs from Si MOSFETs. Dynamic Rds-on, self-commutated reverse conduction, gate voltage and current requirements, and the effects of very fast switching are explained from an applications perspective. This paper reviews available literature on commercial and near-commercial GaN HFETs, to prepare engineers with Si-based power electronics experience to effectively design GaN-based converters.

Application-Based Review of GaN HFETs

Compared with the state-of-the-art Si-based power devices, enhancement-mode Gallium Nitride (E-mode GaN) transistors have better figures of merit and exhibit great potential in enabling higher switching frequency, higher efficiency, and higher power density for power converters. The bridge-leg configuration circuit, consisting of a controlling switch and a synchronous switch, is a critical component in many power converters. However, owing to the low threshold voltage and fast switching speed, E-mode GaN devices are more prone to false turn-on phenomenon in bridge-leg configuration, leading to undesirable results, such as higher switching loss, circuit oscillation, and shoot through. In order to expand gate terminal's safe operating margin without increasing reverse conduction loss during deadtime, negative gate voltage bias for turn-off and antiparallel diode could be applied to E-mode GaN device. In this paper, with consideration of strong nonlinearities in C–V and I–V characteristics of high-voltage (650 V) E-mode GaN transistors, analytical device models are first developed. Then, we develop an analytical circuit model that combines the circuit parameters with intrinsic characteristics of the high-voltage GaN transistor and antiparallel diode. Thus, key transient waveforms with regard to the false turn-on problem can be acquired, including displacement current and false triggering voltage pulse on gate terminal. The simulated waveforms are then verified on a testing board with GaN-based bridge-leg circuit. In contrast to piecewise switching process models and PSpice simulation, the proposed model exhibits outstanding performances. To provide design guidelines for mitigating false turn-on of GaN transistor, the impacts of different circuit parameters, along with the optimum negative gate voltage bias, are investigated based on the proposed model.

An Analytical Model for False Turn-On Evaluation of High-Voltage Enhancement-Mode GaN Transistor in Bridge-Leg Configuration

A novel gate drive circuit suitable for a next-generation semiconductor [gallium nitride field-effect transistor (GaN FET)] is proposed and discussed in this paper. The GaN FET has an inherent problem in that its loss increases on the reverse conduction time, if it is driven with a conventional gate drive circuit. This active discharged-type gate drive circuit proposed here can decrease the loss, so that the disadvantage is overcome. The gate drive loss is also analyzed, and the results have errors within the range of 5%. The effectiveness of the gate drive circuit is evaluated by applying a low leakage current (LLC) converter. The results show that the proposed circuit can improve the efficiency at all ranges.

A Novel High-Efficiency Gate Drive Circuit for Normally Off-Type GaN FET

Currently, driving power circuits at high switching frequency is performed in order to downsize and lighten switching power supplies. Along with it, wide band gap semiconductor devices, GaN and SiC, have attracted attention. However, there is a great constrain related to the false turn-on phenomenon produced by gate noise because these wide band gap semiconductor devices have low threshold voltage. If the false turn-on phenomenon occurs, the efficiency of the power supply decreases. Therefore, this paper analyzes the gate noise performance using simulation and experimental tests focusing on the parasitic inductance of the power devices terminals. As a result, it was found that the gate noises can be related to the recovery current of the body diodes. Additionally, this analysis was theorized by the comparison between the experimental results and the theoretical equation using an equivalent circuit.

An analysis of false turn-on mechanism on power devices

Recently, Gallium Nitride (GaN) power devices have become very attractive because of their high power density. GaN FETs, however, differ from MOSFETs, and it is possible that GaN-based power electronics circuits show lower efficiency than Si-based circuits because of their unique characteristics. A capacitor-less gate drive circuit is proposed as a solution. This paper shows the effectiveness of a capacitor-less gate circuit in terms of gate drive loss, reverse conduction loss, and recovery loss, and compares it with capacitor-type gate drive circuits for GaN FETs. Drive loss analysis of an inverted gate drive circuit showing the lowest losses among capacitor-type gate drive circuits and a capacitor-less gate drive circuit was made to examine the differences between them. The results show that higher efficiency operation is obtained by applying a capacitor-less gate drive circuit to simple test circuits.

Capacitor-Less Gate Drive Circuit Capable of High-Efficiency Operation for Non-Insulating-Gate GaN FETs

The demand of high power Continuous Conduction Mode (CCM) Power Factor Correction (PFC) converter installed in charging devices for Electric and Hybrid Vehicles has grown in the recent years. In these converters, the inductor often appears as the largest component, consequently, the CCM boost PFC converter using coupled inductors is well-known as one of the topologies that can achieve miniaturization and weight reduction of the inductors. However, the change of the magnetic flux during a half cycle of the input AC voltage has not yet been analyzed in detail. Therefore, the cause of the difference of the magnetic saturation is not known. In the case of non-coupled inductor, the magnetic saturation occurs at a point of the peak inductor current. In contrast, in the case of the coupled inductor, the magnetic saturation occurs at a different point than the inductor current peak. In this paper, the change of the magnetic flux in a half cycle of the input AC voltage is analyzed. Additionally, the novel design method of the coupled inductor considering the maximum magnetic flux is proposed. Finally, the validity of the novel design method is confirmed by experimental tests.

Design method considering magnetic saturation issue of coupled inductor in interleaved CCM boost PFC converter

This paper proposes a novel gate-drive circuit suitable for the GaNFET. The gate-drive makes GaNFET turn-off sufficiently and also reduce a loss in the reverse conduction time which the reverse drain-source current flows to GaNFET at off-state. Moreover, the losses caused by the recovery phenomenon are compared the proposed gate-drive circuit with the conventional gate-drive circuit. In addition, a detailed loss analysis of the proposed gate-drive circuit is stated in this paper. Furthermore, the validity of the proposed circuit is evaluated and discussed from the experimental point of view.

Fumiya Hattori

Papers

A Novel High-Efficiency Gate Drive Circuit for Normally Off-Type GaN FET

An analysis of false turn-on mechanism on power devices

Capacitor-Less Gate Drive Circuit Capable of High-Efficiency Operation for Non-Insulating-Gate GaN FETs

Design method considering magnetic saturation issue of coupled inductor in interleaved CCM boost PFC converter

Proposal and analysis of gate drive circuit suitable for GaN-FET