Gagandeep Singh

TL;DR: NAPEL is presented, a high-level performance and energy estimation framework for NMC architectures that leverages ensemble learning to develop a model that is based on micro architectural parameters and application characteristics and is capable of making accurate predictions for previously-unseen applications.

TL;DR: This paper focuses on analyzing and organizing the extensive body of literature on near- memory computing across various dimensions: starting from the memory level where this paradigm is applied, to the granularity of the application that could be executed on the near-memory units.

TL;DR: NERO, an FPGA+HBM-based accelerator connected through IBM CAPI2 (Coherent Accelerator Processor Interface) to an IBM POWER9 host system is developed and it is concluded that employing near-memory acceleration solutions for weather prediction modeling is promising as a means to achieve both high performance and high energy efficiency.

TL;DR: In this paper, the authors leverage an FPGA with HBM for improving the prealignment filtering step of genome analysis and representative kernels from a weather prediction model and demonstrate large speedups and energy savings over a high-end IBM POWER9 system and a conventional FPGAs board with DDR4 memory.

TL;DR: In this article, the authors survey the prior art on NMC across various dimensions (architecture, applications, tools, etc.) and identify the key challenges and open issues with future research directions.