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Design Of Analog Cmos Integrated Circuits

A novel approach to filter design, based on Adams' [1] ‘log-domain’ filters, is proposed that yields a truly current-mode circuit realisation. Adams' idea, which was introduced in a limited context, is generalised to permit a complete distortionless synthesis procedure, which results in circuit implementations readily realisable using complementary bipolar processes. It is shown that, by introducing an exponential map on the state-space description of the desired linear system, a log-domain filter can be fully realised with transistors configured in current mirror-type groupings, current sources and capacitors. Owing to the mapping, the state variables are intrinsically related to current, and not voltage, in the resulting circuits, a fact that emphasises the current-mode nature of the design. A general biquadratic filter section is designed, and, following discussion of cascading sections, a seventh-order Chebychev lowpass filter is designed. All designed circuits are shown to be tunable over a two-decade range in frequency while their characteristics are accurately preserved, even for biquad sections whose f0Q product is greater than fT/10. The Chebychev filter is shown in simulation to possess nearly 60 dB dynamic range relative to 0.9% THD, with a cutoff frequency of nearly 5 MHz, using transistor models from AT&T's CBIC-R 300 MHz complementary bipolar process.

Log-domain filtering: an approach to current-mode filtering

In this paper, a basic cell for low-power and/or low-voltage operation is identified. It is evidenced how different versions of this cell, coined as "flipped voltage follower (FVF)" have been used in the past for many applications. A detailed classification of basic topologies derived from the FVF is given. In addition, a comprehensive list of recently proposed low-voltage/low-power CMOS circuits based on the FVF is given. Although the paper has a tutorial taste, some new applications of the FVF are also presented and supported by a set of simulated and experimental results. Finally, a design example showing the application of the FVF to build systems based on translinear loops is described which shows the potential of this cell for the design of high-performance low-power/low-voltage analog and mixed-signal circuits.

The flipped voltage follower: a useful cell for low-voltage low-power circuit design

This survey presents an overview of recent advances in the state of the art for computer-aided design (CAD) tools for analog and mixed-signal integrated circuits (ICs). Analog blocks typically constitute only a small fraction of the components on mixed-signal ICs and emerging systems-on-a-chip (SoC) designs. But due to the increasing levels of integration available in silicon technology and the growing requirement for digital systems to communicate with the continuous-valued external world, there is a growing need for CAD tools that increase the design productivity and improve the quality of analog integrated circuits. This paper describes the motivation and evolution of these tools and outlines progress on the various design problems involved: simulation and modeling, symbolic analysis, synthesis and optimization, layout generation, yield analysis and design centering, and test. This paper summarizes the problems for which viable solutions are emerging and those which are still unsolved.

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Computer-aided design of analog and mixed-signal integrated circuits

VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)

CHAPTER 1: OVERVIEW OF MIXED-SIGNAL TESTING 1.1 Mixed-Signal Ciruits 1.2 Why Test Mixed-Signal Devices 1.3 Post-Silicon Production Flow 1.4 Test and Diagnostic Equipment 1.5 New Product Development 1.6 Mixed-Signal Testing Challenges CHAPTER 2: THE TEST SPECIFICATION PROCESS 2.1 Device Data Sheets 2.2 Generating the Test Plan 2.3 Components of a Test Program 2.4 Summary CHAPTER 3: DC AND PARAMETRIC MEASUREMENTS 3.1 Continuity 3.2 Leakage Currents 3.3 Power Supply Currents 3.4 DC References and Regulators 3.5 Impedance Measurements 3.6 DC Offset Measurements 3.7 DC Gain Measurements 3.8 DC Power Supply Rejection Ratio 3.9 DC Common Mode Rejection Ratio 3.10 Comparator DC Tests 3.11 Voltage Search Techniques 3.12 DC Tests for Digital Circuits 3.13 Summary CHAPTER 4: MEASUREMENT ACCURACY 4.1 Terminology 4.2 Calibrations and Checkers 4.3 Dealing with Measurement Error 4.4 Basic Data Analysis 4.5 Summary CHAPTER 5: TESTER HARDWARE 5.1 Mixed-Signal Tester Overview 5.2 DC Resources 5.3 Digital Subsystem 5.4 AC Source and Measurement 5.5 Time Measurement System 5.6 Computing Hardware 5.7 Summary CHAPTER 6: SAMPLING THEORY 6.1 Analog Measurements Using DSP 6.2 Sampling and Reconstruction 6.3 Repetitive Sample Sets 6.4 Synchronization of Sampling Systems 6.5 Summary CHAPTER 7: DSP-BASED TESTING 7.1 Advantages of DSP-Based Testing 7.2 Digital Signal Processing 7.3 Discrete-Time Transforms 7.4 The Inverse FFT 7.5 Summary CHAPTER 8: ANALOG CHANNEL TESTING 8.1 Overview 8.2 Gain and Level Tests 8.3 Phase Tests 8.4 Distortion Tests 8.5 Signal Rejection Tests 8.6 Noise Tests 8.7 Simulation of Analog Channel Tests 8.8 Summary CHAPTER 9: SAMPLED CHANNEL TESTING 9.1 Overview 9.2 Sampling Considerations 9.3 Encoding and Decoding 9.4 Sampled Channel Tests 9.5 Summary CHAPTER 10: FOCUSED CALIBRATIONS 10.1 Overview 10.2 DC Calibrations 10.3 AC Amplitude Calibrations 10.4 Other AC Calibrations 10.5 Error Cancellation Techniques 10.6 Summary CHAPTER 11: DAC TESTING 11.1 Basics of Converter Testing 11.2 Basic DC Tests 11.3 Transfer Curve Tests 11.4 Dynamic DAC Tests 11.5 DAC Architectures 11.6 Summary CHAPTER 12: ADC TESTING 12.1 ADC Testing Versus DAC Testing 12.2 ADC Code Edge Measurements 12.3 DC Tests and Transfer Curve Tests 12.4 Dynamic ADC Tests 12.5 ADC Architectures 12.6 Tests for Common ADC Applications 12.7 Summary CHAPTER 13: DIB DESIGN 13.1 DIB Basics 13.2 Printed Circuit Boards (PCBS) 13.3 DIB Traces, Shields, and Guards 13.4 Transmission Lines 13.5 Grounding and Power Distribution 13.6 DIB Components 13.7 Common DIB Circuits 13.8 Common DIB Mistakes 13.9 Summary CHAPTER 14: DESIGN FOR TEST (DFT) 14.1 Overview 14.2 Advantages of DfT 14.3 Digital Scan 14.4 Digital BIST 14.5 Digital DfT for Mixed-Signal Circuits 14.6 Mixed-Signal Boundary Scan and BIST 14.7 Ad Hoc Mixed-Signal DfT 14.8 Subtle Forms of Analog DFT 14.9 IDDQ 14.10 Summary CHAPTER 15: DATA ANALYSIS 15.1 Introduction to Data Analysis 15.2 Data Visualization Tools 15.3 Statistical Analysis 15.4 Statistical Process Control (SPC) 15.5 Summary CHAPTER 16: TEST ECONOMICS 16.1 Profitability Factors 16.2 Direct Testing Costs 16.3 Debugging Skills 16.4 Emerging Trends 16.5 Summary

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An Introduction to Mixed-Signal IC Test and Measurement

This letter proposes an entirely new method for performing analogue signal filtering. All circuits are based upon current amplifiers but derived from well-known voltage amplifier circuits. These circuits possess the same sensitivity properties as their voltage amplifier counterparts. However, it is expected that these circuits will operate at higher signal bandwidths, with greater linearity, and have larger dynamic range than their voltage-based circuit counterparts.

All current-mode frequency selective circuits

With the growing interest in current-mode analogue circuits, an historical account of the invention of the current conveyor is given. Some observations are made on the progress in its realisation and application over the past two decades. New results on the monolithic implementation of the current conveyor are presented.<
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The current conveyor: history, progress and new results

Built-In-Self-Test (BIST) for VLSI systems is desirable in order to reduce the cost per chip of production-time testing by the manufacturer. In addition, it can provide the means to perform in-the-field diagnostics. This paper discusses a mixed analog-digital BIST (MADBIST) for a signal-to-noise-ratio test of an analog-to-digital converter. The MAD-BIST strategy for the SNR test of the A/D converter is introduced, accuracy issues are discussed, and experimental results are presented. >

A BIST scheme for an SNR test of a sigma-delta ADC

This paper presents a short review of time-to-digital and digital-to-time converters (TDCs and DTCs, respectively) adopting a time-mode signal-processing perspective. The primary definitions, operating principles, and basic building blocks are presented. The discussion applies to most, if not all, DTCs and TDCs. A series of voltage-controlled delay units are used as the primary building block of these converter circuits. When configured in a servo-loop manner, a very short time resolution is achievable with excellent manufacturing robustness. Such designs can be synthesized in field-programmable gate arrays (FPGAs) or constructed in custom silicon. TDCs and DTCs are not new, as they have extensively been used for making very accurate and repeatable time measurements in both the physics-related and semiconductor industry. Today, TDCs and DTCs are finding new applications in phase-locked loops and frequency synthesizers.

Gordon W. Roberts

Papers

An Introduction to Mixed-Signal IC Test and Measurement

All current-mode frequency selective circuits

The current conveyor: history, progress and new results

A BIST scheme for an SNR test of a sigma-delta ADC

A Brief Introduction to Time-to-Digital and Digital-to-Time Converters