Active gate driving has been demonstrated to beneficially shape switching waveforms in Si- and SiC-based power converters. For faster GaN power devices with sub-10-ns switching transients, however, reported variable gate driving has so far been limited to altering a single drive parameter once per switching event, either during or outside of the transient. This paper demonstrates a gate driver with a timing resolution and range of output resistance levels that surpass those of existing gate drivers or arbitrary waveform generators. It is shown to permit active gate driving with a bandwidth that is high enough to shape a GaN switching during the transient. The programmable gate driver has integrated high-speed memory, control logic, and multiple parallel output stages. During switching transients, the gate driver can activate a near-arbitrary sequence of pull-up or pull-down output resistances between 0.12 and 64 Ω. A hybrid of clocked and asynchronous control logic with 150-ps delay elements achieves an effective resistance update rate of 6.7 GHz during switching events. This active gate driver is evaluated in a 1-MHz bridge-leg converter using EPC2015 GaN FETs. The results show that aggressive manipulation of the gate-drive resistance at sub-nanosecond resolutions can profile gate waveforms of the GaN FET, thereby beneficially shaping the switch-node voltage waveform in the power circuit. Examples of open-loop active gate driving are demonstrated that maintain the low switching loss of constant-strength gate driving, while reducing overshoot, oscillation, and EMI-generating high-frequency spectral content.

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A 6.7-GHz Active Gate Driver for GaN FETs to Combat Overshoot, Ringing, and EMI

Driving solutions for power semiconductor devices are experiencing new challenges since the emerging wide bandgap power devices, such as silicon carbide (SiC), with superior performance become commercially available. Generally, high switching speed is desired due to the lower switching loss, yet high $dv/dt$ and $di/dt$ can result in elevated electromagnetic interference (EMI) emission, false-triggering, and other detrimental effects during switching transients. Active gate drivers (AGDs) have been proposed to balance the switching losses and the switching speed of each switching transient. The review of the in-existence AGD methodologies for SiC devices has not been reported yet. This review starts with the essence of the slew rate control and its significance. Then, a comprehensive review categorizing the state-of-the-art AGD methodologies is presented. It is followed by a summary of the AGDs control and timing strategies. In this work, using AGD to reduce the EMI noise of a 10-kV SiC MOSFET system is reported. This work also highlights other capabilities of AGDs, including reliability enhancement of power devices and rebalancing the mismatched electrical parameters of parallel- and series-connected devices. These application scenarios of AGDs are validated via simulation and experimental results.

A Review of Switching Slew Rate Control for Silicon Carbide Devices Using Active Gate Drivers

The requirements for peripheral circuits of power converters are becoming more restrictive due to the enhancement of Si-based power devices and due to practical use of SiC device. In the design of modern high-speed switching converters, the stray inductances and capacitances both in the device package and in the gate drive circuit in addition to those in the main circuit of the power converter must be considered. In these situations, the gate driving technique represents the key technology for enhancement of high-speed switching ability of power devices, as there are design limitations to reduce the stray inductances and capacitances. So far, several active gate control methods have been proposed. Most conventional active gate drivers are configured using analog circuits such as transistors and diodes. Thus, it is difficult to reconfigure their control parameters to fit the stray inductances and capacitances after the implementation of power converter and gate circuits. As a solution to these problems, the authors have proposed a programmable gate driver IC, which is a digitally controlled circuit. This gate driver IC can control the gate current at 63 separate levels, operated by programmable fully digital 12-bit and clock signals. In this paper, an active gate current control based on the load current in a half-bridge inverter with two programmable gate driver ICs is demonstrated. This developed gate control is different to the general current feedback control followed the reference value. It is verified that the proposed active gate control can effectively improve the tradeoff relationship between the surge voltage and switching loss of the pulsewidth modulation half-bridge inverter circuit.

Active Gate Control in Half-Bridge Inverters Using Programmable Gate Driver ICs to Improve Both Surge Voltage and Converter Efficiency

Active gate driving has been shown to provide reduced circuit losses and improved switching waveform quality in power electronic circuits. An integrated active gate driver with 150 ps resolution has previously been shown to offer the expected benefits in GaN-based converters. However, the use of low-voltage, high-speed transistors limits its output voltage range to 5 V, too low for many emerging SiC and GaN devices. This paper introduces a series connection of two commercially available conventional drivers and an improved 5 V, 100 ps resolution active driver. The first conventional driver lifts the gate voltage from the negative hold-off voltage to just below the gate threshold voltage, the active driver performs active high-resolution control around the gate threshold, after which the second conventional driver raises the gate voltage to reach optimal R dson values. This driver is demonstrated on a 900-V SiC MOSFET that requires a 15 V onstate gate voltage to achieve optimum R dson . The device is switched at 50 V/ns in a 100-kHz, non-synchronous, 1:10, 300-W boost converter, with the power device switching 600 V and 5 A. It is shown that the gate voltage can be affected on a 100 ps scale, and that meaningful changes to fast power waveforms can be achieved.

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Multi-level active gate driver for SiC MOSFETs

Mixing multitrack music is an expert task where characteristics of the individual elements and their sum are manipulated in terms of balance, timbre and positioning, to resolve technical issues and to meet the creative vision of the artist or engineer. In this paper we conduct a mixing experiment where eight songs are each mixed by eight different engineers. We consider a range of features describing the dynamic, spatial and spectral characteristics of each track, and perform a multidimensional analysis of variance to assess whether the instrument, song and/or engineer is the determining factor that explains the resulting variance, trend, or consistency in mixing methodology. A number of assumed mixing rules from literature are discussed in the light of this data, and implications regarding the automation of various mixing processes are explored. Part of the data used in this work is published in a new online multitrack dataset through which public domain recordings, mixes, and mix settings (DAW projects) can be shared.

An analysis and evaluation of audio features for multitrack music mixtures

With switching transients as fast as 100 V/ns and a low threshold voltage of 1–2 V, GaN FETs in bridge-leg topologies are potentially vulnerable to crosstalk and the resultant unwanted partial turn-on, noise interference, and increased losses. Constant-strength gate drivers for GaN FETs limit switching speed to suppress crosstalk. In this work, active gate driving is shown to permit faster switching, whilst still suppressing crosstalk. This is demonstrated in a GaN FET bridge-leg converter. The control device transients are shaped to reduce crosstalk, whilst the synchronous device's gate impedance is actively varied to increase its immunity to crosstalk. This is carried out using two 6.7-GHz active gate drivers that can dynamically vary their output resistance from 0.12 Ω to 64 Ω every 150 ps during the sub-10-ns switching transients. It is demonstrated that unwanted turn-on is suppressed without incurring undershoot and oscillation in the gate, that negative spurious gate voltages can be greatly reduced, and that oscillations in the transient drain current are damped, without incurring additional loss.

/pdf/crosstalk-suppression-in-a-650-v-gan-fet-bridgeleg-converter-3ca4l80nuu.pdf

Crosstalk suppression in a 650-V GaN FET bridgeleg converter using 6.7-GHz active gate driver

Active gate driving of power devices seeks to shape switching trajectories via the gate, for example, to reduce EMI without degrading efficiency. To this end, driver ICs with integrated arbitrary waveform generators have been used to achieve complex gate signals. This article describes, for the first time, the implementation details of a digitally programmable arbitrary waveform gate driver capable of a 10-GHz waypoint rate, including comprehensive design considerations for critical high-speed subsystems that codify the tradeoff in flexibility, speed, and area. The design, which is taped out in a 180-nm high-voltage CMOS process, utilizes buffers that switch up to ten times in a single clock cycle to overcome the limited achievable clock speed of high-voltage silicon integrated circuits and a fully digital architecture to provide robustness under high slew rates of the ground rail. The driver IC has networks of 100-ps delay elements that are configured prior to a switching transient, to selectively control an array of fast, parallel-connected drivers with different output impedances. Key to the high timing resolution are high-speed asynchronous circuits for memory readout, output buffering, and pulse generation. The driver IC is experimentally evaluated to have a 100-ps resolution and to operate reliably in a 400-V gallium nitride (GaN) bridge leg, under ground-rail voltage slew rates peaking at over 100 V/ns. Design rules are provided to obtain an architecture with the least area for a given set of timing and impedance resolution requirements. The reported design methods enable complex driving waveforms to be applied during nanosecond-scale transients of GaN power devices and demonstrate how digitally programmable active gate drivers for GaN power FETs can be designed to meet a given set of application requirements.

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Full Custom Design of an Arbitrary Waveform Gate Driver With 10-GHz Waypoint Rates for GaN FETs

The design of a high-fidelity electronic current sensor for utility power-metering applications is described. The sensor is based around a current transformer with a low-permeability core material in order to yield a high dc tolerance and improved immunity to extraneous dc magnetic fields. The transformer is configured with a flux-change sense winding and feedforward of the voltage developed across the secondary winding and burden resistances. This minimizes the error due to magnetizing current which would otherwise be high with a low-permeability core material. Experimental results are given for a 60-A sensor designed for single-phase 50- and 60-Hz systems. Measured phase error is less than 0.6° at 50 Hz with 60-A dc current superimposed onto the current under measurement. No Hall-effect sensors or core-gapping operations are required. Combined with simple analog electronic circuitry, this provides a low-cost solution.

High-Fidelity Low-Cost Electronic Current Sensor for Utility Power Metering

Active gate driving provides an opportunity to reduce EMI in power electronic circuits. Whilst it has been demonstrated for MOS-gated silicon power semiconductor devices, reported advanced gate driving in wide-bandgap devices has been limited to a single impedance change during the device switching transitions. For the first time, this paper shows multi-point gate signal profiling at the sub-ns resolution required for GaN devices. A high-speed, programmable active gate driver is implemented with an integrated high-speed memory and output stage to realise arbitrary gate pull-up and pulldown resistance profiles. The nominal resistance range is 120 μΩ to 64 Ω, and the timing resolution of impedance changes is 150 ps. This driver is used in a 1 MHz GaN bridge leg that represents a synchronous buck converter. It is demonstrated that the gate voltage profile can be manipulated aggressively in nanosecond scale. It is observed that by profiling the first 5 ns of the control device's gate voltage transient, a reduction in switch-node voltage oscillations is observed, resulting in an 8–16 dB reduction in spectral power between 400 MHz and 1.8 GHz. This occurs without an increase in switching loss. A small increase in spectral power is seen below 320 MHz. As a baseline for comparison, the GaN bridge leg is operated with a fixed gate drive strength. It is concluded that p-type gate GaN HFETs are actively controllable, and that EMI can be reduced without increasing switching loss.

/pdf/reduction-of-oscillations-in-a-gan-bridge-leg-using-active-2z08y1upug.pdf

Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-resistance patterns

Power semiconductor devices have maximum junction temperature limits, but it is not straightforward to sense or infer temperature inside sealed devices in running converters. One method is to observe electrical behavior that is known to be temperature dependent. For example, in some gallium nitride (GaN) power semiconductor devices, the maximum slope of the device current at turn- on has been shown to reduce as the junction temperature increases. This article demonstrates the first noncontact overtemperature protection circuit for GaN power devices that exploits this effect and overcomes the complication that this inverse proportionality is affected by load current. A variant of a previously reported magnetic field “Infinity Sensor,” named after its figure-of-eight topology and high bandwidth (>200 MHz), measures di/dt . Using the sensor signal as the only input, a detection circuit finds peak di/dt , and a high-speed integrator derives instantaneous load current. The reference voltage for the decision-making part of the circuit is automatically adjusted as a function of load current, in order to counteract the dependence of di/dt on load current. Experimental results on a 400 V, 2 kW buck converter show the protection circuit successfully activating within ±5 °C of a preprogrammed junction temperature setting, independently of load current, for settings of 100, 120, and 140 °C.

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Harry C. P. Dymond

Papers

Crosstalk suppression in a 650-V GaN FET bridgeleg converter using 6.7-GHz active gate driver

Full Custom Design of an Arbitrary Waveform Gate Driver With 10-GHz Waypoint Rates for GaN FETs

High-Fidelity Low-Cost Electronic Current Sensor for Utility Power Metering

Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-resistance patterns

Overtemperature Protection Circuit for GaN Devices Using a di/dt Sensor