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Hong-Yeh Chang

Researcher at National Central University

Publications -  166
Citations -  2283

Hong-Yeh Chang is an academic researcher from National Central University. The author has contributed to research in topics: CMOS & Phase noise. The author has an hindex of 24, co-authored 164 publications receiving 2095 citations. Previous affiliations of Hong-Yeh Chang include National Taipei University & National Taiwan University.

Papers
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Journal ArticleDOI

A 0.5–7.5 GHz Ultra Low-Voltage Low-Power Mixer Using Bulk-Injection Method by 0.18- $\mu$ m CMOS Technology

TL;DR: In this article, a fully differential low-voltage low-power downconversion mixer using a TSMC 0.18-mum CMOS logic process is presented, and the mixer was designed with a four-terminal MOS transistor, the radiofrequency (RF) and local-oscillator signals apply to the gate and bulk of the device, respectively while the intermediate frequency (IF) signals output was from the drain, the mixer features a maximum conversion gain of 5.7dB at 2.4 GHz, an ultra low dc power consumption of 0.48 m
Proceedings ArticleDOI

A 60GHz Low-Power Six-Port Transceiver for Gigabit Software-Defined Transceiver Applications

TL;DR: A 60GHz six-port transceiver IC in a standard-bulk 0.13mum CMOS process is reported, and the measured results show 4.5dB conversion gain and 4Gb/s modulation BW with 97.7mW DC power consumption.
Journal ArticleDOI

Millimeter-wave MMIC passive HEMT switches using traveling-wave concept

TL;DR: In this paper, the authors describe the design of millimeter-wave wideband monolithic GaAs passive high electron-mobility transistor (HEMT) switches using the traveling-wave concept.
Journal ArticleDOI

Analysis of Multiconductor Coupled-Line Marchand Baluns for Miniature MMIC Design

TL;DR: In this paper, a simple two-conductor coupled-line model is used to analyze the Marchand balun and simplify the analysis significantly, and two monolithic balanced frequency doublers are implemented to verify the design procedure.
Journal ArticleDOI

Design and analysis of CMOS broad-band compact high-linearity modulators for gigabit microwave/millimeter-wave applications

TL;DR: In this paper, a modified reflection-type topology with the transmission lines implemented on the thick SiO/sub 2/ layer to avoid the lossy silicon substrate is proposed and analyzed.