Introduction to Electromagnetic Compatibility

It is well known that single-phase pulse width modulation rectifiers have second-order harmonic currents and corresponding ripple voltages on the dc bus. The low-frequency harmonic current is normally filtered using a bulk capacitor in the bus, which results in low power density. However, pursuing high power density in converter design is a very important goal in the aerospace applications. This paper studies methods for reducing the energy storage capacitor for single-phase rectifiers. The minimum ripple energy storage requirement is derived independently of a specific topology. Based on the minimum ripple energy requirement, the feasibility of the active capacitor's reduction schemes is verified. Then, we propose a bidirectional buck-boost converter as the ripple energy storage circuit, which can effectively reduce the energy storage capacitance. The analysis and design are validated by simulation and experimental results.

A High Power Density Single-Phase PWM Rectifier With Active Ripple Energy Storage

Interleaving technique is used in some applications due to its advantages regarding filter reduction, dynamic response, and power management. In dual battery system vehicles, the bidirectional dc-dc converter takes advantage of this technique using three-to-five paralleled buck stages. In this paper, we propose the use of a much higher number of phases in parallel together with digital control. It will be shown that this approach opens new possibilities since changes in the technology are possible. Thus, two 1000-W prototypes have been designed using surface mount technology devices (SO-8 transistors). An additional important feature is that due to the accuracy of the digital device [field-programmable gate array (FPGA)], current loops have been eliminated, greatly simplifying the implementation of the control stage

Automotive DC-DC bidirectional converter made with many interleaved buck stages

Power density of power electronic converters in different applications has roughly doubled every 10 years since 1970. Behind this trajectory was the continuous advancement of power semiconductor device technology allowing an increase of converter switching frequencies by a factor of 10 every decade. However, today's cooling concepts, and passive components and wire bond interconnection technologies could be major barriers for a continuation of this trend. For identifying and quantifying such technological barriers this paper investigates the volume of the cooling system and of the main passive components for the basic forms of power electronics energy conversion in dependency of the switching frequency and determines switching frequencies minimizing the total volume. The analysis is for 5 kW rated output power, high performance air cooling, advanced power semiconductors, and single systems in all cases. A power density limit of 28 kW/dm3@300 kHz is calculated for an isolated DC-DC converter considering only transformer, output inductor and heat sink volume. For single-phase AC-DC conversion a general limit of 35 kW/dm3 results from the DC link capacitor required for buffering the power fluctuating with twice the mains frequency. For a three-phase unity power factor PWM rectifier the limit is 45 kW/dm3@810 kHz just taking into account EMI filter and cooling system. For the sparse matrix converter the limiting components are the input EMI filter and the common mode output inductor; the power density limit is 71 kW/dm3@50 kHz when not considering the cooling system. The calculated power density limits highlight the major importance of broadening the scope of research in power electronics from traditional areas like converter topologies, and modulation and control concepts to cooling systems, high frequency electromagnetics, interconnection technology, multi-functional integration, packaging and multi-domain modeling and simulation to ensure further advancement of the field along the power density trajectory.

https://www.hpe.ee.ethz.ch/uploads/tx_ethpublications/IEEJ_PowerDensity_Paper_FinalRevised_03.pdf

PWM Converter Power Density Barriers

During recent years, silicon carbide (SiC) power electronics has gone from being a promising future technology to being a potent alternative to state-of-the-art silicon (Si) technology in high-efficiency, highfrequency, and high-temperature applications. The reasons for this are that SiC power electronics may have higher voltage ratings, lower voltage drops, higher maximum temperatures, and higher thermal conductivities. It is now a fact that several manufacturers are capable of developing and processing high-quality transistors at cost that permit introduction of new products in application areas where the benefits of the SiC technology can provide significant system advantages.

Silicon Carbide Power Transistors: A New Era in Power Electronics Is Initiated

Silicon carbide (SiC) power semiconductor devices are capable of being operated at higher voltages, frequencies and temperatures than silicon power devices. These SiC device capabilities will provide the power electronics designer with new possibilities to produce compact designs. Presently the JFET is the only controlled turn off/on SiC device that is close to commercialization and available as restricted samples. However the JFET is a normally-on device that requires a negative gate voltage to turn off. In order to correctly design a gate driver one must understand the characteristics of the JFET. This paper presents a description of the JFET semiconductor structure, and the SiC JFET's static and dynamic characteristics from room temperature to 200 /spl deg/C. A SiC JFET gate driver circuit is presented and its performance described. The proposed gate driver improves the switching performance of the JFET by operating the gate in avalanche during the off time.

A SiC JFET driver for a 5 kW, 150 kHz three-phase PWM converter

Interleaving in synchronous rectifiers can lead to reduced losses in both the active and passive components. However, this depends on selecting the correct number of phases and the correct phase inductance for a particular application and requirements. In this paper optimizing the number of phases and the phase inductance is considered to maximize the interleaved synchronous rectifiers efficiency over the desired operating range. To do this, the RMS currents and losses in the bus capacitors, the phase inductances and the switching devices as a function of the number of phases and duty cycle are considered. Generic equations are presented and used to predict the RMS currents in the passive components with some non-intuitive results especially concerning the bus capacitors. It is shown in the paper, that the optimum number of phases is dependent on the converter parameters such as the phase inductance and operating requirements. Practical results are presented confirming the synchronous rectifier loss model.

Interleaving optimization in synchronous rectified DC/DC converters

Generally, passive components and inductors in particular, contribute greatly to the overall volume of power electronic converters. These components are normally packaged individually with little concern for the overall system. For high density switching power supplies it is imperative to minimise the volume to as great an extent as possible. which implies that the passive component volume usage needs to be improved. This can be accomplished by applying suitable packaging and cooling techniques to these components. In this paper, two inductor structures finding application in a 2.1 kW synchronous automotive converter are described. The airgap placement, losses, cooling methods and thermal profiles are analysed and verified experimentally with an inductor designed for operation at 85/spl deg/C ambient.

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A very high density, heatsink mounted inductor for automotive applications

In this paper, a very high power density DC/DC converter module for automotive applications is investigated. The 14-V/42-V converter is specified to operate at a power level of 2.1 kW with a water cooled heat sink at 85/spl deg/C. The design and implementation of very high density passive components are discussed. Using the results of the passive component design, a prototype converter is built, achieving a final power density of 170W/in/sup 3/. The thermal performance of the passive components and the converter module under different electrical and thermal excitations is investigated and recorded. Results are presented over the full excitation range.

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High density packaging of the passive components in an automotive DC/DC converter

A planar integrated inductor-capacitor-transformer structure is described for use in series resonant converters. The construction and design of the structure is described, and design equations derived. The structure is analyzed from a volumetric point of view and some of the limits of the technology are discussed. Experimental results of an LCT structure for a 5 kVA converter at 25 kHz are presented.

Ivan W. Hofsajer

Papers

A SiC JFET driver for a 5 kW, 150 kHz three-phase PWM converter

Interleaving optimization in synchronous rectified DC/DC converters

A very high density, heatsink mounted inductor for automotive applications

High density packaging of the passive components in an automotive DC/DC converter

Design and analysis of planar integrated L-C-T components for converters