A comprehensive review of the electrical performance of passive transformers fabricated in silicon IC technology is presented. Two types of transformer construction are considered in detail, and the characteristics of two-port (1:1 and 1:n turns ratio) and multiport transformers (i.e., baluns) are presented from both computer simulation and experimental measurements. The effects of parasitics and imperfect coupling between transformer windings are outlined from the circuit point of view. Resonant tuning is shown to reduce the losses between input and output at the expense of operating bandwidth. A procedure for estimating the size of a monolithic transformer to meet a given specification is outlined, and circuit examples are used to illustrate the applications of the monolithic transformer in RF ICs.

Monolithic transformers for silicon RF IC design

A modification of stacked spiral inductors increases the self-resonance frequency by 100% with no additional processing steps, yielding values of 5 to 266 nH and self-resonance frequencies of 11.2 to 0.5 GHz. Closed-form expressions predicting the self-resonance frequency with less than 5% error have also been developed. Stacked transformers are also introduced that achieve voltage gains of 1.8 to 3 at multigigahertz frequencies. The structures have been fabricated in standard digital CMOS technologies with four and five metal layers.

Stacked inductors and transformers in CMOS technology

The construction and electrical characteristics of two-port transformers (1:1 and 1:n turns ratio) and multi-port transformer baluns fabricated in a production silicon technology are presented. A high-linearity 5 GHz mixer design illustrates the advantages of the trifilar transformer in an RF IC application.

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An efficient modeling technique and a novel CAD tool for the accurate prediction of the performance of integrated inductors and transformers is presented. This generic and process-independent approach generates lumped-element models that easily plug into the RF IC design flow. Their accuracy is established through comparisons with measurements of numerous fabricated inductor structures. This paper intends to provide answers to vital questions in regard to existing limits and future expectations of the performance of on-chip inductors using comprehensive nomographs and quantitative analysis of spiral inductor families. An LNA design paradigm depicts how first-time-working silicon can be achieved when on-chip inductors' coupling is taken into account during the layout design process, minimizing risk, time, and cost.

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Systematic analysis and modeling of integrated inductors and transformers in RF IC design

A low-noise amplifier (LNA) uses low-loss monolithic transformer feedback to neutralize the gate-drain overlap capacitance of a field-effect transistor (FET). A differential implementation in 0.18-/spl mu/m CMOS technology, designed for 5-GHz wireless local-area networks (LANs), achieves a measured power gain of 14.2 dB, noise figure (NF, 50 /spl Omega/) of 0.9 dB, and third-order input intercept point (IIP3) of +0.9 dBm at 5.75 GHz, while consuming 16 mW from a 1-V supply. The feedback design is benchmarked to a 5.75-GHz cascode LNA fabricated in the same technology that realizes 14.1-dB gain, 1.8-dB NF, and IIP3 of +4.2 dBm, while dissipating 21.6 mW at 1.8 V.

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A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-/spl mu/m CMOS

A 900 MHz low-noise amplifier (LNA) utilizing three monolithic transformers to implement on-chip tuning networks and requiring no external components has been integrated in 2.88 mm/sup 2/ in a standard digital 0.6 /spl mu/m CMOS process. A bias current reuse technique is employed to reduce power dissipation, and process-, voltage-, and temperature-tracking biasing techniques are used. At 900 MHz, the LNA dissipates 18 mW from a single 3 V power supply and provides 4.1 dB noise figure, 12.3 dB power gain, -33.0 dB reverse isolation, and an input 1-db compression level of -16 dBm. Analysis and modeling considerations for silicon-based monolithic transformers are presented, and it is shown that a monolithic transformer occupies less die area and provides a higher quality factor than two independent inductors with the same effective inductance in differential applications.

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J.J. Zhou

Papers

Monolithic transformers and their application in a differential CMOS RF low-noise amplifier