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Jang-Mok Kim

Researcher at Pusan National University

Publications -  182
Citations -  3151

Jang-Mok Kim is an academic researcher from Pusan National University. The author has contributed to research in topics: Pulse-width modulation & Voltage. The author has an hindex of 23, co-authored 178 publications receiving 2652 citations. Previous affiliations of Jang-Mok Kim include Florida A&M University & Yeungnam University.

Papers
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Dead Time Compensation Method for Voltage-Fed PWM Inverter

TL;DR: In this article, the authors proposed a new dead time compensation method for a PWM inverter, which can be easily implemented by feedforwardly adding compensation voltages to the output reference voltage of the synchronous d-axis proportional-integral current regulator.
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Circulating Current Control in MMC Under the Unbalanced Voltage

TL;DR: In this article, a dual vector current controller is adopted as an ac-side current controller to reduce the ac-sensor active power ripple under unbalanced voltage conditions in modular multilevel converters (MMCs).
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Model Predictive Control With a Reduced Number of Considered States in a Modular Multilevel Converter for HVDC System

TL;DR: In this article, the authors proposed a model predictive control (MPC) method for modular-multilevel-converter (MMC) high-voltage direct current (HVDC) systems.
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Development of Hardware In-the-Loop Simulation System for Testing Operation and Control Functions of Microgrid

TL;DR: In this paper, a hardware in-the-loop simulation (HILS) system is proposed to develop and test control algorithms and operation strategies for a microgrid, which is composed of a real-time digital simulator (RTDS) for realtime simulation of the micro-grid, a prototype microgrid management system (MMS) under test, and a communication emulator for interface between the prototype MMS and the RTDS.
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Fault Diagnosis of DC-Link Capacitors in Three-Phase AC/DC PWM Converters by Online Estimation of Equivalent Series Resistance

TL;DR: A novel scheme for the estimation of the equivalent series resistance (ESR) of the dc-link electrolytic capacitor in three-phase ac/dc pulsewidth-modulation converters is proposed for condition monitoring, where the recursive least squares algorithm is used for reliable estimation results.