The objective of this paper is to give a comprehensive introduction to applied cryptography with an engineer or computer scientist in mind. The emphasis is on the knowledge needed to create practical systems which supports integrity, confidentiality, or authenticity. Topics covered includes an introduction to the concepts in cryptography, attacks against cryptographic systems, key use and handling, random bit generation, encryption modes, and message authentication codes. Recommendations on algorithms and further reading is given in the end of the paper. This paper should make the reader able to build, understand and evaluate system descriptions and designs based on the cryptographic components described in the paper.

[서평]「Applied Cryptography」

We review a model of computation used in industrial practice in signal processing software environments and experimentally and other contexts. We give this model the name "dataflow process networks," and study its formal properties as well as its utility as a basis for programming language design. Variants of this model are used in commercial visual programming systems such as SPW from the Alta Group of Cadence (formerly Comdisco Systems), COSSAP from Synopsys (formerly Cadis), the DSP Station from Mentor Graphics, and Hypersignal from Hyperception. They are also used in research software such as Khoros from the University of New Mexico and Ptolemy from the University of California at Berkeley, among many others. Dataflow process networks are shown to be a special case of Kahn process networks, a model of computation where a number of concurrent processes communicate through unidirectional FIFO channels, where writes to the channel are nonblocking, and reads are blocking. In dataflow process networks, each process consists of repeated "firings" of a dataflow "actor." An actor defines a (often functional) quantum of computation. By dividing processes into actor firings, the considerable overhead of context switching incurred in most implementations of Kahn process networks is avoided. We relate dataflow process networks to other dataflow models, including those used in dataflow machines, such as static dataflow and the tagged-token model. We also relate dataflow process networks to functional languages such as Haskell, and show that modern language concepts such as higher-order functions and polymorphism can be used effectively in dataflow process networks. A number of programming examples using a visual syntax are given. >

/pdf/dataflow-process-networks-3mdwy0uhx2.pdf

Dataflow process networks

The rapid uptake of mobile devices and the rising popularity of mobile applications and services pose unprecedented demands on mobile and wireless networking infrastructure. Upcoming 5G systems are evolving to support exploding mobile traffic volumes, real-time extraction of fine-grained analytics, and agile management of network resources, so as to maximize user experience. Fulfilling these tasks is challenging, as mobile environments are increasingly complex, heterogeneous, and evolving. One potential solution is to resort to advanced machine learning techniques, in order to help manage the rise in data volumes and algorithm-driven applications. The recent success of deep learning underpins new and powerful tools that tackle problems in this space. In this paper, we bridge the gap between deep learning and mobile and wireless networking research, by presenting a comprehensive survey of the crossovers between the two areas. We first briefly introduce essential background and state-of-the-art in deep learning techniques with potential applications to networking. We then discuss several techniques and platforms that facilitate the efficient deployment of deep learning onto mobile systems. Subsequently, we provide an encyclopedic review of mobile and wireless networking research based on deep learning, which we categorize by different domains. Drawing from our experience, we discuss how to tailor deep learning to mobile environments. We complete this survey by pinpointing current challenges and open future directions for research.

/pdf/deep-learning-in-mobile-and-wireless-networking-a-survey-ct8cy2kuqi.pdf

Deep Learning in Mobile and Wireless Networking: A Survey

Objects. The ~ b s t rac t ~ b j ect forms the fundamental base class for the entire design and all other classes are derived from this base class. The Abstract Object class defines and characterizes all the essential properties every class in this 404 OBJECT-ORIENTED SIMULATION

Handbook of Simulation

Network lifetime has become the key characteristic for evaluating sensor networks in an application-specific way. Especially the availability of nodes, the sensor coverage, and the connectivity have been included in discussions on network lifetime. Even quality of service measures can be reduced to lifetime considerations. A great number of algorithms and methods were proposed to increase the lifetime of a sensor network—while their evaluations were always based on a particular definition of network lifetime. Motivated by the great differences in existing definitions of sensor network lifetime that are used in relevant publications, we reviewed the state of the art in lifetime definitions, their differences, advantages, and limitations. This survey was the starting point for our work towards a generic definition of sensor network lifetime for use in analytic evaluations as well as in simulation models—focusing on a formal and concise definition of accumulated network lifetime and total network lifetime. Our definition incorporates the components of existing lifetime definitions, and introduces some additional measures. One new concept is the ability to express the service disruption tolerance of a network. Another new concept is the notion of time-integration: in many cases, it is sufficient if a requirement is fulfilled over a certain period of time, instead of at every point in time. In addition, we combine coverage and connectivity to form a single requirement called connected coverage. We show that connected coverage is different from requiring noncombined coverage and connectivity. Finally, our definition also supports the concept of graceful degradation by providing means of estimating the degree of compliance with the application requirements. We demonstrate the applicability of our definition based on the surveyed lifetime definitions as well as using some example scenarios to explain the various aspects influencing sensor network lifetime.

/pdf/on-the-lifetime-of-wireless-sensor-networks-59hdyqoqi3.pdf

On the lifetime of wireless sensor networks

The exponential increment in data size poses new challenges for computer scientists, giving rise to a new set of methodologies under the term Big Data. Many efficient algorithms for machine learning have been proposed, facing up time and memory requirements. Nevertheless, with hardware acceleration, multiple software instructions can be integrated and executed into a single hardware die. Current researches aim at eliminating the burden for the user in using multiple processor types. In this paper we propose our return of experience on a new way of implementing machine learning algorithms on heterogeneous hardware. To explore our vision, we use a parallel Mean-shift algorithm, developed at LIPN as our case study to investigate issues in building efficient Machine Learning libraries for heterogeneous systems. The ultimate goal is to provide a core set of building blocks for Machine Learning programming that could serve either to build new applications on heterogeneous architectures or to control the evolution of the underlying platform. We thus examine the difficulties encountered during the implementation of the algorithm with the aim to discover methodologies for building systems based on heterogeneous hardware. We also discover issues and building blocks for solving concrete machine learning (ML) problems on the Chisel software stack we use for this purpose.

Return of experience on the mean-shift clustering for heterogeneous architecture use case

Large-scale distributed memory multiprocessors have become commercially available and have proved to be a low-cost alternative to supercomputers for many scientific computations. The programming, and debugging, of such systems remains, however, a difficult and tedious task. Single-assignment and applicative languages have proved to be a serious alternative to imperative languages for the programming of parallel computer systems. They offer the advantage of a high level of programmability and eliminate the problem of detecting parallelism. Their functional property allows an asynchronous parallel execution that does not compromise the correctness of the computation. This paper describes the implementation of a single-assignment language, SISAL, on a distributed memory multiprocessor.

A Single-Assignment Language in a Distributed Memory Multiprocessor

In application-specific multiprocessor system-on-a-chips (MPSoC), the complexity of a general-purpose interface control block which implements input/output (I/O) paths for off-chip communication has increased exponentially in recent years. In addition, several inherent issues exist in the design of general-purpose interface control blocks, since many registers and multiple I/O paths are fixed in the relatively late stages of the design, which consequently reduces verification time of the top level. Also, the role of a general-purpose interface control block, which shares a limited number of pins with various IPs, causes frequent changes in pin assignment. This results in many possible human errors when using a traditional RTL description in designing such blocks. In response to this problem, this paper presents a Design Automation-based approach to improve the efficiency and reliability of the design process. In the case study presented, we succeeded in auto-generating a general-purpose interface control block in typical MPSoC platforms with more than 400 general-purpose interfaces including both input and output, as well as 1,200 PAD pins. Ultimately, we reduced the amount of manual description for the generation of a general-purpose interface control block by a whopping 98%.

An Efficient I/O Interface Control Block Design Methodology for Application-Specific MPSoC Platforms

A new approach in which stateful computations can be performed within the framework of a functional programming language is presented. In most functional programming languages, programmers are unable to easily manipulate state-based computations which are not supported by functional languages. To solve this problem, the authors propose to extend the Sisal language with special user declared variables. This approach can greatly help users in writing programs, simplifying parallel compilation, and improving performance. Under this scheme, programmers are able to manipulate stateful computations. In the methodology, programmers are allowed to declare special variables, and the parallel threads can be identified according to the usage of special variables. When compared to "pure" functional languages, the extended Sisal has more expressive power due to the availability of stateful computations.

Extending functional languages with stateful computations

The application of data-driven principles of execution to several numerically intensive computations is described. The fast Fourier transform, the bitonic sort method, the LU decomposition algorithm and matrix multiplication have been chosen since they are representative of a large class of algorithms and provide good benchmarks for the evaluation of the performance of data-flow systems. First, a high-level data-flow language (SISAL) is used to express the algorithms involved. Then the transformation between the high-level program and the low-level data-flow mechanisms is demonstrated, using general methods of translation applied to a number of high-level program constructs. Particular attention is given to the issue of structure-handling. The MIT tagged-token data-flow architecture has been simulated and provides the basis for a performance analysis of the translation methods. >

Jean-Luc Gaudiot

Papers

Return of experience on the mean-shift clustering for heterogeneous architecture use case

A Single-Assignment Language in a Distributed Memory Multiprocessor

An Efficient I/O Interface Control Block Design Methodology for Application-Specific MPSoC Platforms

Extending functional languages with stateful computations

Transformation of numerical algorithms for data-flow processing