An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

Power semiconductor devices and methods of manufacture

This invention generally relates to power semiconductor devices, and in particular to improved thyristor devices and circuits. The techniques we describe are particularly useful for so-called MOS-gated thyristors. We describe a thyristor comprising a plurality of power thyristor devices connected in parallel, each said thyristor device being operable at a device current which the device has an on-resistance with a positive temperature coefficient.

Power Semiconductor Devices

Semiconductor Power Devices

AlGaN-GaN power high-electron mobility transistors (HEMTs) with 600-V breakdown voltage are fabricated and demonstrated as switching power devices for motor drive and power supply applications. The fabricated power HEMT realized the high breakdown voltage by optimized field plate technique and the low on-state resistance of 3.3 m/spl Omega/cm/sup 2/, which is 20 times lower than that or silicon MOSFETs, thanks to the high critical field of GaN material and the high mobility in 2DEG channel. The fabricated devices also demonstrated the high current density switching of 850 A/cm/sup 2/ turn-off. These results show that AlGaN-GaN power-HEMTs are one of the most promising candidates for future switching power device for power electronics applications.

High breakdown voltage AlGaN-GaN power-HEMT design and high current density switching behavior

For the first time a new device concept for high voltage power devices has been realized in silicon. Our 600 V-COOLMOS/sup TM/ reaches an area specific on-resistance of typically 3.5 /spl Omega//spl middot/mm/sup 2/. Our technology thus offers a shrink factor of 5 versus the actual state of the art in power MOSFETs. The device concept is based on charge compensation in the drift region of the transistor. We increase the doping of the vertical drift region roughly by one order of magnitude and counterbalance this additional charge by the implementation of fine structured columns of the opposite doping type. The blocking voltage of the transistor remains thus unaltered. The charge compensating columns do not contribute to the current conduction during the turn-on state. Nevertheless the drastically increased doping of the drift region allows the above mentioned reduction of the on-resistance.

A new generation of high voltage MOSFETs breaks the limit line of silicon

The claimed field effect-controlled semiconductor component has a drain zone of the first conduction type, at least one gate electrode made of polycrystalline silicon and insulated from the drain zone, and a source region of the second conduction type built into the drain zone. In addition, a trench structure is also formed in the drain zone; this can extend from the surface of the epitaxial layer down to the substrate layer, and contains an additional polysilicon magnetoresistor embedded in an oxide layer. The oxide surrounding the polysilicon magnetoresistor increases in thickness vertically towards the drain.

Field effect-controlled semiconductor component

A model is proposed to explain the anomalous current-voltage characteristics of ESFI MOS transistors. Due to the floating state the substrate potential of the ESFI transistor is increasing with increasing majority carrier current flowing through the substrate to source. In the region of multiplication by avalanche that effect will get quite pronounced. The change of substrate potential yields a change of the threshold voltage hereby increasing the drain current and resulting a bend in the I D (U D ) curves. The assumptions of the model have been justified by additional experiments as with illumination of light or increased temperatures. Based on the physical model a computer program was developed to simulate the I D (U D ) characteristics of ESFI MOS transistors of the enhancement type, resulting good agreement between measured and simulated characteristics.

Influence of the floating substrate potential on the characteristics of ESFI MOS transistors

The voltage peaks occuring upon disconnection of inductive loads are normally attenuated by a by-pass diode connected in parallel with the load. The driving countervoltage is thereby limited to the value of the forward voltage drop of the diode. For a power MOSFET with a source-side inductive load, the driving countervoltage is increased by placing a series connection of an additional MOSFET and a Zener diode between the gate of the power MOSFET and the connection of the load which is remote from the power MOSFET. The driving countervoltage at the source now becomes the Zener voltage plus the occuring gate-source voltage of the power MOSFET.

Mosfet switch with an inductive load

The development of vertical power MOSFETs has made it possible for MOS and bipolar functions to be combined advantageously. The SIPMOS (Siemens Power MOS) technique is eminently suitable for this purpose. Vertical MOSFET-triggered thyristors, optically coupled lateral thyristors with MOS input and optically coupled MOS triacs have been implemented and investigated. The common advantages of functionally integrated MOS-bipolar structures are the high input sensitivity, high dV/dt immunity and excellent di/dt capability.

Jenö Dr. Tihanyi

Papers

A new generation of high voltage MOSFETs breaks the limit line of silicon

Field effect-controlled semiconductor component

Influence of the floating substrate potential on the characteristics of ESFI MOS transistors

Mosfet switch with an inductive load

Functional integration of power MOS and bipolar devices