Fundamentals Of Modern Vlsi Devices

An image sensor and a method for fabricating the same are provided. The image sensor includes a first conductive type substrate including a trench formed in a predetermined portion of the first conductive type substrate, a second conductive type impurity region for use in a photodiode, formed below a bottom surface of the trench in the first conductive type substrate, and a first conductive type epitaxial layer for use in the photodiode, buried in the trench.

Image sensor and method for fabricating the same

Digital color imaging relies on spectral filters on top of a pixelated sensor, such as a CMOS image sensor. An important parameter of imaging devices is their resolution, which depends on the size of the pixels. For many applications, a high resolution is desirable, consequently requiring small spectral filters. Dielectric nanostructures, due to their resonant behavior and its tunability, offer the possibility to be assembled into flexible and miniature spectral filters, which could potentially replace conventional pigmented and dye-based color filters. In this paper, we demonstrate the generation of transmissive structural colors based on uniform-height amorphous silicon nanostructures. We optimize the structures for the primary RGB colors and report the construction of submicrometer RGB filter arrays for a pixel size down to 0.5 ?m.

Submicrometer Nanostructure-Based RGB Filters for CMOS Image Sensors

Digital color imaging relies on spectral filters on top of a pixelated sensor, such as a CMOS image sensor. An important parameter of imaging devices is their resolution, which depends on the size of the pixels. For many applications, a high resolution is desirable, consequently requiring small spectral filters. Dielectric nanostructures, due to their resonant behavior and its tunability, offer the possibility to be assembled into flexible and miniature spectral filters, which could potentially replace conventional pigmented and dye-based color filters. In this paper, we demonstrate the generation of transmissive structural colors based on uniform-height amorphous silicon nanostructures. We optimize the structures for the primary RGB colors and report the construction of sub-micrometer RGB filter arrays for a pixel size down to 0.5 {\mu}m.

Sub-micrometer Nanostructure-based RGB Filters for CMOS Image Sensors

Packages and 3D die stacking processes are described. In an embodiment, a package includes a second level die hybrid bonded to a first package level including a first level die encapsulated in an oxide layer, and a plurality of through oxide vias (TOVs) extending through the oxide layer. In an embodiment, the TOVs and the first level die have a height of about 20 microns or less.

Independent 3D stacking

A submicron pixel's light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e-/s at 60 °C, an ultra-low read noise of 0.90 e-·rms, a high full well capacity (FWC) of 4100 e-, and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed.

A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel.

Various structures of image sensors are disclosed, as well as methods of forming the image sensors. According to an embodiment, a structure comprises a substrate comprising photo diodes, an oxide layer on the substrate, recesses in the oxide layer and corresponding to the photo diodes, a reflective guide material on a sidewall of each of the recesses, and color filters each being disposed in a respective one of the recesses. The oxide layer and the reflective guide material form a grid among the color filters, and at least a portion of the oxide layer and a portion of the reflective guide material are disposed between neighboring color filters.

Image Sensor Comprising Reflective Guide Layer and Method of Forming the Same

The pinned photodiode capacitance extraction method proposed by Goiffon et al. is discussed, and two additional new methods are presented and analyzed; one based on the full well dependence on photon flux and the other based on the full well dependence on transfer-gate off-voltage.

Extraction and Estimation of Pinned Photodiode Capacitance in CMOS Image Sensors

A back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using a vertical transfer gate structure for improved quantum efficiency (QE) and global shutter efficiency (GSE) is provided. A semiconductor column extends vertically from a photodetector, towards a back-end-of-line (BEOL) stack. A floating diffusion region (FDR) is vertically spaced from the photodetector by the semiconductor column. The FDR comprises a sidewall surface laterally offset from a neighboring sidewall surface of the semiconductor column to define a lateral recess between the FDR and the photodetector. A gate dielectric layer lines the sidewall surface of the semiconductor column and is arranged in the lateral recess. A gate is arranged laterally adjacent to the gate dielectric layer and filling the lateral recess. Further, a method for manufacturing the vertical transfer gate structure is provided.

Vertical transfer gate structure for a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using global shutter capture

An image sensor includes a substrate, dual-waveband photosensitive devices, at least one infrared photosensitive device, a transparent dielectric layer, at least one infrared band-pass filter, a color filter layer and a micro-lens layer. The dual-waveband photosensitive devices are disposed in the substrate, and each dual-waveband photosensitive device is configured to sense an infrared light and one visible light. The infrared photosensitive device is disposed in the substrate, in which the dual-waveband photosensitive devices and the infrared photosensitive device are arranged in an array. The transparent dielectric layer is disposed over the dual-waveband photosensitive devices and the infrared photosensitive device. The infrared band-pass filter is disposed in the transparent dielectric layer and corresponds to the infrared photosensitive device. The color filter layer is disposed to cover the transparent dielectric layer and the infrared band-pass filter. The micro-lens layer is disposed on the color filter layer.

Jhy-Jyi Sze

Papers

A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel.

Image Sensor Comprising Reflective Guide Layer and Method of Forming the Same

Extraction and Estimation of Pinned Photodiode Capacitance in CMOS Image Sensors

Vertical transfer gate structure for a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using global shutter capture

Infrared image sensor