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John Wiley Blackledge

Researcher at IBM

Publications -  22
Citations -  993

John Wiley Blackledge is an academic researcher from IBM. The author has contributed to research in topics: Personal computer & Master boot record. The author has an hindex of 13, co-authored 22 publications receiving 993 citations.

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Patent

Apparatus and method for preventing unauthorized access to BIOS in a personal computer system

TL;DR: In this paper, the authors present an apparatus and method for protecting BIOS stored on a direct access storage device into a personnal computer system, which consists of a system processor, a system planar, a random access main memory, read only memory, a protection means and at least one direct access disk device.
Patent

Apparatus and method for loading a system reference diskette image from a system partition in a personal computer system

TL;DR: In this article, a direct access storage device controller coupled between the system processor and direct access disk device includes a protection mechanism for protecting a region of the storage device, which includes a master boot record, a BIOS image and a system reference diskette image.
Patent

Method and apparatus for configuring a bus-to-bus bridge

TL;DR: In this paper, an information processing system includes a processor for processing information; a processor bus, a first expansion bus, and a host bridge for coupling the processor bus to the first expansion buses; a second expansion bus; a first bus bridge and a first storage device for storing a first set of configuration data for the plurality of I/O devices.
Patent

Bios load for a personal computer system having a removable processor card

TL;DR: In this paper, the authors present an apparatus for loading BIOS stored on a direct access storage device in a personal computer system, the system comprising direct-access storage device, and a processor card removably mounted to a planar board.
Patent

Address space architecture for multiple bus computer systems

TL;DR: In this paper, a bridge circuit is proposed for coupling the first bus to the second bus to determine whether the address signal emitted by the processor corresponds to a peripheral device coupled to a bus subordinate to the bridge circuit.