Showing papers by "Jon Andreu published in 2016"

Modulation Strategy for Multiphase Neutral-Point-Clamped Converters

Abstract: This paper presents a novel modulation strategy for n -phase neutral-point-clamped (NPC) converters. The proposed modulation strategy is able to control and completely remove the low-frequency neutral-point (NP) voltage oscillations for any operation point and load types. Even when unbalanced and/or nonlinear loads are considered, the NP voltage remains under total control. Consequently, the strategy is very attractive for n -phase active filters. In addition, it enables the use of low-capacity film capacitors in NPC converters. The proposed modulation takes the carrier-based modulation strategy as a basis. It is formulated following a generalized approach that makes it expandable to n -phase NPC converters. In addition, the NP voltage is controlled directly using a closed-loop algorithm that does not rely on the use of the linear control regulators or the additional compensators used in other modulation algorithms. Therefore, no tuning of parameters is required and it performs optimally for any operating conditions and kind of loads, including unbalanced and nonlinear loads. Although the high-frequency harmonic content of the output voltages may increase, the weighted total harmonic distortion generated by the proposed strategy is similar to that of a standard sinusoidal pulse width modulated strategy. The proposed modulation algorithm has been tested in a four-leg NPC converter prototype performing as a three- and four-phase system and operating with balanced and unbalanced loads.

Analysis and modelling of IGBTs parallelization fundamentals

Abstract: In some power electronic applications, with high current and voltage ranges, discrete devices are not enough unless parallelization techniques are employed. IGBTs are one of the most common and widespread power electronic semiconductors, to make a parallel design with them, either as a discrete devices, dies, individual cells or power modules, it is necessary to know their static and dynamic behaviour. Besides, operation temperature, device parameter tolerances, driver circuit and power layout, as well as different parasitic inductance also affect its performance. The objective of this article is to show and model how all the aforementioned parameters affect the behaviour and performance of a parallelized IGBT, and highlight the design keys for a successful parallelized design.

A universal formulation for selective harmonic elimination PWM with half-wave symmetry for multilevel voltage source converters

Abstract: Selective harmonic elimination (SHE) - pulse with modulation (PWM), when applied to multilevel converters (MCs), can be optimized in case a half-wave (HW) symmetry is implemented. This kind of symmetry is able to provide a wide variety of solutions. This paper proposes a novel method, based on optimization algorithms, which provides a universal formulation of the SHE-PWM problem with HW symmetry, in such a way that different equation systems are not required to find a solution when different switching patterns are considered. In this way, the proposed technique is able to search simultaneously both the switching patterns and their associated firing angles that solve the SHE-PWM problem, without using predefined waveforms. Therefore, the search process is significantly simplified and the flexibility to find solutions with different waveforms, throughout the reference modulation index, m a , range, is increased. Different sets of solutions provided by this method have been presented and simulation results, obtained from a five-level modular multilevel converter (MMC), have proved the validity of the new proposed technique.