J
Juergen Becker
Researcher at Karlsruhe Institute of Technology
Publications - 95
Citations - 1127
Juergen Becker is an academic researcher from Karlsruhe Institute of Technology. The author has contributed to research in topics: Field-programmable gate array & Control reconfiguration. The author has an hindex of 13, co-authored 93 publications receiving 1046 citations.
Papers
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Proceedings ArticleDOI
Quality metrics for optical signals: Eye diagram, Q-factor, OSNR, EVM and BER
Wolfgang Freude,Rene Schmogrow,Bernd Nebendahl,M. Winter,Arne Josten,David Hillerkuss,S. Koenig,J. Meyer,M. Dreschmann,Michael Huebner,Christian Koos,Juergen Becker,Juerg Leuthold +12 more
TL;DR: It is concluded that for optical channels with additive Gaussian noise the EVM metric is a reliable quality measure and for nondata-aided reception, BER below 0.01 can be estimated from measured EVM.
Journal ArticleDOI
Single-laser 32.5 Tbit/s Nyquist WDM transmission
David Hillerkuss,Rene Schmogrow,Matthias Meyer,Stefan Wolf,M. Jordan,P. Kleinow,Nicole Lindenmann,P. C. Schindler,Argishti Melikyan,Xin Yang,Shalva Ben-Ezra,Bernd Nebendahl,M. Dreschmann,J. Meyer,Francesca Parmigiani,Periklis Petropoulos,Bojan Resan,Andreas Oehler,Kurt J. Weingarten,Lars Altenhain,T. Ellermeyer,M. Moeller,Michael Huebner,Juergen Becker,Christian Koos,Wolfgang Freude,Juerg Leuthold +26 more
TL;DR: Single-laser 32.5 Tbit/s 16QAM Nyquist-WDM transmission with 325 carriers over 227 km at a net spectral efficiency of 6.4 bit/s/Hz is reported.
Proceedings ArticleDOI
Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration
TL;DR: An overview of the used techniques and the complete system on a Xilinx XC2V3000 FPGA using slices instead of TBUF elements which leads to a benefit by using an automatic modular design flow.
Proceedings ArticleDOI
Power estimation and power measurement of Xilinx Virtex FPGAs: trade-offs and limitations
TL;DR: The exact power consumption trade-offs between the measured runtime consumption of a mapped application and the measured reconfiguration-time consumption of different dynamically (partially and completely) reconfigured applications are discussed.
Proceedings ArticleDOI
KAHRISMA: a novel hypermorphic reconfigurable-instruction-set multi-grained-array architecture
Ralf Koenig,Lars Bauer,Timo Stripf,Muhammad Shafique,Waheed Ahmed,Juergen Becker,Jorg Henkel +6 more
TL;DR: This paper presents the innovative processor architecture concept KAHRISMA (KArlsruhe's Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array), which tightly integrates coarse- and fine- grained run-time reconfigurable fabrics that can incorporate to realize hardware acceleration for computationally complex algorithms.