Showing papers by "Jun Fan published in 2000"
21 Aug 2000
TL;DR: In this paper, the mutual inductance between two closely spaced vias can have a great impact on the coupling between an IC and a decoupling capacitor, which is a function of the spacing between the IC and capacitor, and spacing between power and ground layers.
Abstract: The decoupling capacitor location in DC power bus design is a critical design choice for which proven guidelines are not well established. The mutual inductance between two closely spaced vias can have a great impact on the coupling between an IC and a decoupling capacitor. This coupling is a function of the spacing between the IC and capacitor, and spacing between power and ground layers. The impact of the mutual inductance on decoupling, i.e., local versus global decoupling, was studied, using a circuit extraction approach based on a mixed-potential integral equation. Modeling indicates that local decoupling has benefits over global decoupling for certain ranges of IC/capacitor spacing and power layer thickness. Design curves for evaluating local decoupling benefits were generated, which can be used to guide surface mount technology (SMT) decoupling capacitor placement.
27 citations
23 Oct 2000
TL;DR: In this paper, the authors present a quick and simple approach to perform circuit simulations for an equivalent circuit extracted from a first-principle formulation for DC power bus structures, and compare the modeling and measurements demonstrate the application of this approach.
Abstract: DC power bus modeling in multilayer printed circuit boards (PCB) or multichip module (MCM) substrates is a critical issue in high-speed digital circuit design. This paper presents a quick and simple approach to perform circuit simulations for an equivalent circuit extracted from a first principles formulation for DC power bus structures. Comparisons between the modeling and measurements demonstrate the application of this approach in DC power bus designs.
4 citations
23 Oct 2000
TL;DR: In this article, the dispersive medium is approximated by a Debye model to account for the loss of local decoupling on a DC power-bus and a wide band frequency response (100 MHz-5 GHz) is obtained through a single FDTD simulation.
Abstract: DC power-bus modeling in high-speed digital design using the FDTD method is reported here. The dispersive medium is approximated by a Debye model to account for the loss. A wide band frequency response (100 MHz-5 GHz) is obtained through a single FDTD simulation. Favorable agreement is achieved between the modeled and measured results for a typical DC power-bus structure with multiple SMT decoupling capacitors mounted on the board. The FDTD tool is then applied to investigate the effects of local decoupling on a DC power-bus. The modeled results agree with the results from another modeling tool, the CEMPIE (a circuit extraction approach based on a mixed-potential integral equation formulation) method.
3 citations
03 May 2000
TL;DR: In this paper, a circuit extraction approach based on a mixedpotential integral equation formulation is presented to model arbitrary multilayer power bus structures including vertical discontinuities associated with surface mount (SMT) decoupling capacitor interconnects.
Abstract: Power bus design is a critical aspect in high-speed digital circuit designs. A circuit extraction approach based on a mixed-potential integral equation formulation is presented herein to model arbitrary multilayer power bus structures including vertical discontinuities associated with surface mount (SMT) decoupling capacitor interconnects. Both conductor and dielectric losses are incorporated, and included into the first principles formulation. The agreement of modeling and measurements demonstrates its effectiveness and utilization in power bus designs.
1 citations