The authors discuss high-voltage power conversion. Conventional series connection and three-level voltage source inverter techniques are reviewed and compared. A novel versatile multilevel commutation cell is introduced: it is shown that this topology is safer and more simple to control, and delivers purer output waveforms. The authors show how this technique can be applied to either choppers or voltage-source inverters and generalized to any number of switches.<<ETX>>

Multi-level conversion : high voltage choppers and voltage-source inverters

Micro-light-emitting diodes (μ-LEDs) are regarded as the cornerstone of next-generation display technology to meet the personalised demands of advanced applications, such as mobile phones, wearable watches, virtual/augmented reality, micro-projectors and ultrahigh-definition TVs. However, as the LED chip size shrinks to below 20 μm, conventional phosphor colour conversion cannot present sufficient luminance and yield to support high-resolution displays due to the low absorption cross-section. The emergence of quantum dot (QD) materials is expected to fill this gap due to their remarkable photoluminescence, narrow bandwidth emission, colour tuneability, high quantum yield and nanoscale size, providing a powerful full-colour solution for μ-LED displays. Here, we comprehensively review the latest progress concerning the implementation of μ-LEDs and QDs in display technology, including μ-LED design and fabrication, large-scale μ-LED transfer and QD full-colour strategy. Outlooks on QD stability, patterning and deposition and challenges of μ-LED displays are also provided. Finally, we discuss the advanced applications of QD-based μ-LED displays, showing the bright future of this technology. Micrometre-sized light-emitting diodes (LEDs) based on quantum dots (QDs) will propel the next generation of display technologies, a review by leading researchers shows. Conventional LED designs, with phosphor coatings that convert light to different colours, are difficult to make smaller than 20 micrometres. Jr-Hau He at City University of Hong Kong and co-workers explain how this problem can be tackled using QDs, tiny particles whose optical properties can be tuned by varying their size, providing brighter and more precise colours. Ultra-high-resolution displays based on phospholuminescent QD-LEDs are now being released to the market thanks to finely-controlled methods for synthesising QDs and depositing them onto films. Further research should focus on the best ways to stabilise and protect QD films within LEDs, and to continue developing electroluminescent QD-LEDs, which could potentially outperform their phospholuminescent cousins.

/pdf/micro-light-emitting-diodes-with-quantum-dots-in-display-539mmezpm0.pdf

Micro-light-emitting diodes with quantum dots in display technology

The fifth generation (5G) mobile networks are envisaged to enable a plethora of breakthrough advancements in wireless technologies, providing support of a diverse set of services over a single platform. While the deployment of 5G systems is scaling up globally, it is time to look ahead for beyond 5G systems. This is mainly driven by the emerging societal trends, calling for fully automated systems and intelligent services supported by extended reality and haptics communications. To accommodate the stringent requirements of their prospective applications, which are data-driven and defined by extremely low-latency, ultra-reliable, fast and seamless wireless connectivity, research initiatives are currently focusing on a progressive roadmap towards the sixth generation (6G) networks, which are expected to bring transformative changes to this premise. In this article, we shed light on some of the major enabling technologies for 6G, which are expected to revolutionize the fundamental architectures of cellular networks and provide multiple homogeneous artificial intelligence-empowered services, including distributed communications, control, computing, sensing, and energy, from its core to its end nodes. In particular, the present paper aims to answer several 6G framework related questions: What are the driving forces for the development of 6G? How will the enabling technologies of 6G differ from those in 5G? What kind of applications and interactions will they support which would not be supported by 5G? We address these questions by presenting a comprehensive study of the 6G vision and outlining seven of its disruptive technologies, i.e., mmWave communications, terahertz communications, optical wireless communications, programmable metasurfaces, drone-based communications, backscatter communications and tactile internet, as well as their potential applications. Then, by leveraging the state-of-the-art literature surveyed for each technology, we discuss the associated requirements, key challenges, and open research problems. These discussions are thereafter used to open up the horizon for future research directions.

A Prospective Look: Key Enabling Technologies, Applications and Open Research Topics in 6G Networks

A precision-scalable processor for low-power ConvNets or convolutional neural networks is implemented in a 40-nm CMOS technology. To minimize energy consumption while maintaining throughput, this paper is the first to implement dynamic precision and energy scaling and exploit the sparsity of convolutions in a dedicated processor architecture. The processor’s 256 parallel processing units achieve a peak 102 GOPS running at 204 MHz and 1.1 V. It is fully C-programmable through a custom generated compiler and consumes 25–287 mW at 204 MHz and a scaling efficiency between 0.3 and 2.7 effective TOPS/W. It achieves 47 frames/s on the convolutional layers of the AlexNet benchmark, consuming only 76 mW. This system hereby outperforms the state-of-the-art up to five times in energy efficiency.

/pdf/an-energy-efficient-precision-scalable-convnet-processor-in-1nw7pddm9p.pdf

An Energy-Efficient Precision-Scalable ConvNet Processor in 40-nm CMOS

Micro light-emitting diode (microLED) technology is expected to be used in next-generation displays and other applications due to its many advantages. This paper categorizes, reviews, and analyzes the main challenges and technical solutions in the microLED displays manufacturing process, covering epitaxial growth, wafer fabrication, mass transfer, control circuit, and panel. In the overview section, the comparison between microLED, liquid crystal display, and organic light-emitting diode displays, as well as the various applications of microLEDs, are reviewed. In the same part, the specific challenges of microLED manufacturing are also discussed, including full-color operation, reduced external quantum efficiency (EQE), low-efficiency and low-yield mass transfer, and structure and process design from a system perspective. In the epitaxial growth section, the requirements, problems, and technical developments of epitaxial growth, especially the growth of AlInGaN red LED, have been reviewed. The microLED chip characterization and fabrication section present the reasons for the low EQE of microLEDs and the methods to overcome this problem. This section also includes the unique characteristics and theories of microLEDs, compared with those of traditional broad-area LEDs. Various mass transfer technologies are summarized in the mass transfer section. The design and operation mechanism of the microLED control circuit is discussed in the control circuit and panel section. This section also introduces the manufacturing and performance improvement of the backplane and the panel. The best way to use this review is to read the overview section first, get a big picture of microLEDs, read the chip section to learn about their special features and reasons behind them, and then go to the parts you are interested in.

https://iopscience.iop.org/article/10.1088/1361-6463/abcfe4/pdf

MicroLED technologies and applications: characteristics, fabrication, progress, and challenges

Reducing the supply voltage of digital circuits to the sub- or near-threshold regions minimizes dynamic power consumption and achieves better efficiency [1]. This technique is widely used in energy-efficient applications, and is especially beneficial for wirelessly powered devices such as wearable electronics, biomedicai implants and smart sensor networks. Such devices have long standby times and battery-less operation is highly desirable. As shown in Fig. 20.5.1, for a typical wireless power transmission system, there is a gap between the rectified V IN (>2V) and the low supply voltage V OUT ( out/ V IN ) and high efficiency are needed. However, a low M results in low efficiency for linear regulators and fully integrated buck converters. On the other hand, fully integrated switched-capacitor power converters (SCPCs) are good alternatives that can achieve high efficiency at low M in low power applications [2-5].

20.5 A 2-/3-phase fully integrated switched-capacitor DC-DC converter in bulk CMOS for energy-efficient digital circuits with 14% efficiency improvement

This paper presents a systematic analysis of integrated 3-level buck converters under both ideal and real conditions as a guidance for designing robust and fast 3-level buck converters Under ideal conditions, the voltage conversion ratio, the output voltage ripple and, in particular, the system's loop-gain function are derived Design considerations for real circuitry implementations of an integrated 3-level converter, such as the implementation of the flying capacitor, the impacts of the parasitic capacitors of the flying capacitor and the 4 power switches, and the time mismatch between the 2 duty-cycle signals are thoroughly discussed Under these conditions, the voltage conversion ratio, the voltage across the flying capacitor and the power efficiency are analyzed and verified with Cadence simulation results The loop-gain function of an integrated 3-level buck converter with parasitic capacitors and time mismatch is derived with the state-space averaging method The derived loop-gain functions are verified with time-domain small signal injection simulation and measurement, with a good match between the analytical and experimental results

Analysis and Design Considerations of Integrated 3-Level Buck Converters

An active matrix light emitting diode (LED) micro-display system was demonstrated with GaN-on-Si epilayers and a custom-designed CMOS backplane using an Au-free Cu/Sn-based metal bonding method. The blue micro-LED array consists of $64\times36$ pixels with a pitch size of $40\,\,\mu \text{m}\,\,\times 40\,\,\mu \text{m}$ and a pixel density of 635 pixels/in (ppi). The Si substrate for the LED growth was removed by reactive ion etching (RIE) using SF6-based gas after flip-chip bonding. Crack-free and smooth GaN layers in the display area were exposed. Images and videos with 4-bit grayscale could be clearly rendered, and light crosstalk was significantly suppressed compared to its counterpart using the GaN-on-sapphire epilayers. The demonstration suggests the tremendous potential of the low-cost and large-scale GaN-on-Si epilayers and cost-effective Au-free Cu/Sn-based bonding scheme for micro-display applications.

Active Matrix Monolithic LED Micro-Display Using GaN-on-Si Epilayers

A fully integrated step-down switched-capacitor dc–dc converter ring with 123 phases has been designed that could achieve fast dynamic voltage scaling for the microprocessor of wearable devices. The symmetrical multiphase converter ring surrounds its load in the square and supplies power to the on-chip power grid that is easily accessible at any point of the chip edges. The frequency of the $V_{\mathrm {DD}}$ -controlled oscillator is adjusted through its supply voltage $V_{\mathrm {DD}}$ , which allows the unity-gain frequency to be designed higher than the switching frequency. The converter ring has been fabricated in a low-leakage 65-nm CMOS process. This converter achieves a response time of 3 ns, a reference tracking speed of 2.5 V/ $\mu \text{s}$ , and a minimum output ripple of 2.2 mV. The peak efficiency is 80% at the power density of 66.6 mW/mm2, and the maximum power density is 180 mW/mm2.

A Multiphase Switched-Capacitor DC–DC Converter Ring With Fast Transient Response and Small Ripple

Inspired by The Square of Vatican City, a fully integrated step-down switched-capacitor DC-DC converter ring with 100+ phases is designed with a fast dynamic voltage scaling (DVS) feature for the microprocessor in portable or wearable devices. As shown in Fig. 20.4.1, this symmetrical ring-shaped converter surrounds its load in the square and supplies the on-chip power grid, such that a good quality power supply can be easily accessed at any point of the chip edges. There are 30 phases on the top edge and 31 phases on each of the other 3 edges, making 123 phases in total. The phase number and unit cell dimensions of this architecture can easily be adjusted to fit the floor plan of the load. The pads of the converter-ring are placed at the corners, and will not affect the pads of the load. Moreover, by using the proposed V DD -controlled oscillator (V DD CO), the frequency of which is controlled by varying its supply voltage, a hitherto unexplored feature of the multiphase DC-DC architecture is exposed: the control-loop unity gain frequency (UGF) could be designed to be higher than the switching frequency.

Junmin Jiang

Papers

20.5 A 2-/3-phase fully integrated switched-capacitor DC-DC converter in bulk CMOS for energy-efficient digital circuits with 14% efficiency improvement

Analysis and Design Considerations of Integrated 3-Level Buck Converters

Active Matrix Monolithic LED Micro-Display Using GaN-on-Si Epilayers

A Multiphase Switched-Capacitor DC–DC Converter Ring With Fast Transient Response and Small Ripple

20.4 A 123-phase DC-DC converter-ring with fast-DVS for microprocessors