K
Kaijie Wu
Researcher at New York University
Publications - 86
Citations - 2933
Kaijie Wu is an academic researcher from New York University. The author has contributed to research in topics: Error detection and correction & Flash memory. The author has an hindex of 25, co-authored 86 publications receiving 2663 citations. Previous affiliations of Kaijie Wu include University of Illinois at Chicago & Chongqing University.
Papers
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Proceedings ArticleDOI
Scan based side channel attack on dedicated hardware implementations of Data Encryption Standard
Bo Yang,Kaijie Wu,Ramesh Karri +2 more
TL;DR: It is shown that scan chains can be used as a side channel to recover secret keys from a hardware implementation of the Data Encryption Standard (DES) by loading pairs of known plaintexts with one-bit difference in the normal mode and scanning out the internal state in the test mode.
Journal ArticleDOI
Secure Scan: A Design-for-Test Architecture for Crypto Chips
Bo Yang,Kaijie Wu,Ramesh Karri +2 more
TL;DR: The authors used a hardware implementation of the advanced encryption standard to show that the traditional scan DFT scheme can compromise the secret key, and showed that by using secure-scan DFT, neither thesecret key nor the testability of the AES implementation is compromised.
Journal ArticleDOI
The Robust QCA Adder Designs Using Composable QCA Building Blocks
TL;DR: This paper analyzes the reasons of the failures of adder designs using QCA technology, and proposes adders that exploit proper clocking schemes.
Journal ArticleDOI
Concurrent error detection schemes for fault-based side-channel cryptanalysis of symmetric block ciphers
TL;DR: The authors investigate systematic approaches to low-cost low-latency CED techniques for symmetric encryption algorithms based on inverse relationships that exist between encryption and decryption at algorithm level, round level, and operation level and develop CED architectures that explore tradeoffs among area overhead, performance penalty, and fault detection latency.
Proceedings ArticleDOI
Secure scan: a design-for-test architecture for crypto chips
Bo Yang,Kaijie Wu,Ramesh Karri +2 more
TL;DR: The authors used a hardware implementation of the advanced encryption standard to show that the traditional scan DFT scheme can compromise the secret key, and showed that by using secure-scan DFT, neither thesecret key nor the testability of the AES implementation is compromised.