International Journal of Computer and Applications

Much has been written about theory and practice in the law, and the tension between practitioners and theorists. Judges do not cite theoretical articles often; they rarely "apply" theories to particular cases. These arguments are not revisited. Instead the Essay explores the working and interaction of theory and practice, practitioners and theorists. The Essay starts with a story about solving a legal issue using our intellectual tools - theory, practice, and their progenies: experience and "gut." Next the Essay elaborates on the nature of theory, practice, experience and "gut." The third part of the Essay discusses theories that are helpful to practitioners and those that are less helpful. The Essay concludes that practitioners theorize, and theorists practice. They use these intellectual tools differently because the goals and orientations of theorists and practitioners, and the constraints under which they act, differ. Theory, practice, experience and "gut" help us think, remember, decide and create. They complement each other like the two sides of the same coin: distinct but inseparable.

Of Theory and Practice

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Design Of Analog Cmos Integrated Circuits

Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

Aspects of the subject disclosure may include, for example, receiving, by a feed point of a dielectric antenna, electromagnetic waves from a dielectric core coupled to the feed point without an electrical return path, where at least a portion of the dielectric antenna comprises a conductive surface, directing, by the feed point, the electromagnetic waves to a proximal portion of the dielectric antenna, and radiating, via an aperture of the dielectric antenna, a wireless signal responsive to the electromagnetic waves being received at the aperture. Other embodiments are disclosed.

Method and apparatus for coupling an antenna to a device

A simple Dielectric Resonator Antenna (DRA) for X band frequency operation is proposed in this paper. X band is a microwave band lies between frequency range 8 to 12 GHz. In proposed DRA reflector plane is used beneath the microstrip feed line with a small air gap, introduced between feed substrate and reflector plane to reduce the back lobe. Slot coupling is used to excite this DRA. Proposed DRA design gives dual band operation in X band and resonates at frequency 8.6 GHz and 10.3 GHz. Antenna design offers minimum return loss of -20.3 db and -24.5 db at 8.6 GHz and 10.3 GHz respectively. It also offers high front to back ratio (FBR) of 12.35db and 9.83 db at 8.65 GHz and 10.3 GHz respectively. Return loss impedance bandwidth of 390 MHz (4.5%) for Band I and 730MHz (7.3%) for band II is obtained. Simple DRA design with high FBR is proposed here for X band application that shows a total bandwidth of 11.8%. DRA is analysed using Ansoft HFSS based on finite element method. Radiation characteristics of this DRA are observed at resonating frequencies. This DRA is useful at microwave X band application such as satellite communication.

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Dielectric Resonator Antenna for X band Microwave Application

This paper presents an area-time efficient CORDIC algorithm that completely eliminates the scale-factor. By suitable selection of the order of approximation of Taylor series the proposed CORDIC circuit meets the accuracy requirement, and attains the desired range of convergence. Besides we have proposed an algorithm to redefine the elementary angles for reducing the number of CORDIC iterations. A generalized micro-rotation selection technique based on high speed most-significant-1-detection obviates the complex search algorithms for identifying the micro-rotations. The proposed CORDIC processor provides the flexibility to manipulate the number of iterations depending on the accuracy, area and latency requirements. Compared to the existing recursive architectures the proposed one has 17% lower slice-delay product on Xilinx Spartan XC2S200E device.

Area-Time Efficient Scaling-Free CORDIC Using Generalized Micro-Rotation Selection

This paper presents a novel completely scaling-free CORDIC algorithm in rotation mode for hyperbolic trajectory. We use most-significant-1 bit detection technique for micro-rotation sequence generation to reduce the number of iterations. By storing the sinh/cosh hyperbolic values at octant boundaries in a ROM, we can extend the range of convergence to the entire coordinate space. Based on this, we propose a pipeline hyperbolic CORDIC processor to implement a direct digital synthesizer (DDS). The DDS is further used to derive an efficient arbitrary waveform generator (AWG), where a pseudo-random number generator modulates the linear increments of phase to produce random phase-modulated waveform. The proposed waveform generator requires only one DDS for generating variety of modulated waveforms, while existing designs require separate DDS units for different type of waveforms, and multiple DDS units are required to generate composite waveforms. Therefore, area complexity of existing designs gets multiplied with the number of different types waveforms they generate, while in case of proposed design that remains unchanged. The proposed AWG when mapped on Xilinx Spartan 2E device, consumes 1076 slices and 2016 4-input LUTs. The proposed AWG involves significantly less area and lower latency, with nearly the same throughput compared to the existing CORDIC-based designs.

Scale-Free Hyperbolic CORDIC Processor and Its Application to Waveform Generation

This brief presents the key concept, design strategy, and implementation of reconfigurable coordinate rotation digital computer (CORDIC) architectures that can be configured to operate either for circular or for hyperbolic trajectories in rotation as well as vectoring-modes. It can, therefore, be used to perform all the functions of both circular and hyperbolic CORDIC. We propose three reconfigurable CORDIC designs: 1) a reconfigurable rotation-mode CORDIC that operates either for circular or for hyperbolic trajectory; 2) a reconfigurable vectoring-mode CORDIC for circular and hyperbolic trajectories; and 3) a generalized reconfigurable CORDIC that can operate in any of the modes for both circular and hyperbolic trajectories. The reconfigurable CORDIC can perform the computation of various trigonometric and exponential functions, logarithms, square-root, and so on of circular and hyperbolic CORDIC using either rotation-mode or vectoring-mode CORDIC in one single circuit. It can be used in digital synchronizers, graphics processors, scientific calculators, and so on. It offers substantial saving of area complexity over the conventional design for reconfigurable applications.

Concept, Design, and Implementation of Reconfigurable CORDIC

Leakage power consumption is a major technical problem faced in nanometer or deep submicron CMOS circuit technology. A new circuit technique based on “lector stacking” is proposed in this paper for reducing the subthreshold and gate oxide leakage currents in the idle and non-idle modes of operation for domino circuits. In this technique a p-type and an n-type leakage control transistor (LCT) are introduced between the pull-up and pull-down network, and the gate of one is controlled by the source of the other. For any combination of inputs, one of the LCTs will operate near its cut-off region and will increase the resistance between supply voltage and ground, resulting in reduced leakage current. Lector stacking retains the logic state during the idle mode as in the conventional footerless domino logic. Furthermore, the leakage current is suppressed at the output inverter circuit by adding a diode-footed transistor below the n-type transistor of the inverter, offering a more resistive path between supply voltage and ground.The proposed circuit technique for AND2, OR2, OR4, and OR8 circuits reduces the active power consumption by 13.66 % to 44.45 % and by 12 % to 33 % at the low and high die temperatures, respectively, compared to the standard footerless domino logic circuits. During idle mode for the same logic gates, 1.64 % to 79.39 % and 1.2 % to 35.19 % reduction of leakage current is observed with low and high inputs at 25 °C and 110 °C respectively. Similarly, during non-idle mode 0.94 % to 99.3 % and 1.57 % to 98.58 % is observed with low and high inputs at 25 to 110 °C, respectively, when compared to standard footerless domino logic circuits.

Kavita Khare

Papers

Dielectric Resonator Antenna for X band Microwave Application

Area-Time Efficient Scaling-Free CORDIC Using Generalized Micro-Rotation Selection

Scale-Free Hyperbolic CORDIC Processor and Its Application to Waveform Generation

Concept, Design, and Implementation of Reconfigurable CORDIC

Lector with Footed-Diode Inverter: A Technique for Leakage Reduction in Domino Circuits