Before the emergence of ultra-wideband (UWB) radios, widely used wireless communications were based on sinusoidal carriers, and impulse technologies were employed only in specific applications (e.g. radar). In 2002, the Federal Communication Commission (FCC) allowed unlicensed operation between 3.1–10.6 GHz for UWB communication, using a wideband signal format with a low EIRP level (−41.3dBm/MHz). UWB communication systems then emerged as an alternative to narrowband systems and significant effort in this area has been invested at the regulatory, commercial, and research levels.

IEEE Transactions on Microwave Theory and Techniques and Antennas and Propagation Announce a Joint Special Issue on Ultra-Wideband (UWB) Technology

Preface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50# Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90 ) Hybrid. 10.8 The 180 Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty's Idea. 11.3 The Classical Doherty Configuration. 11.4 The 'AB-C' Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

/pdf/high-efficiency-rf-and-microwave-solid-state-power-4xdx1261hq.pdf

High Efficiency RF and Microwave Solid State Power Amplifiers

https://calhoun.nps.edu/bitstream/10945/24839/1/singlesidebandtr00elli.pdf

Single sideband transmission by envelope elimination and restoration.

In-band full-duplex (IBFD) technology can enable unique system capabilities and network architectures by allowing devices to transmit and receive on the same frequency at the same time. While previously considered impossible, this ability can now be used to optimize resource sharing within the crowded frequency spectrum for various communication systems, including 5G new radio. The potential of these IBFD systems can only be realized if each device incorporates a sufficient number of self-interference cancellation techniques to ensure that its receivers do not saturate. This tutorial survey offers the most comprehensive collection to date of these techniques and discusses how all of them can be implemented within the different domains of a typical transceiver. In addition, the results of a novel IBFD system study are presented for more than 50 demonstrated communication systems with more than 80 different measurement scenarios. The various system parameters are then combined into a new figure of merit, which can be used to propel future research and accelerate the inclusion of IBFD technology within an upcoming wireless standard.

In-Band Full-Duplex Technology: Techniques and Systems Survey

In-band full-duplex sets challenging requirements for wireless communication radios, in particular their capability to prevent receiver sensitivity degradation due to self-interference (transmit signals leaking into its own receiver). Previously published self-interference rejection designs require bulky components and/or antenna structures. This paper addresses this form-factor issue. First, compact radio transceiver feasibility bottlenecks are identified analytically, and tradeoff equations in function of link budget parameters are presented. These derivations indicate that the main bottlenecks can be resolved by increasing the isolation in analog/RF. Therefore, two design ideas are proposed, which provide attractive analog/RF-isolation and allow integration in compact radios. The first design proposal targets compact radio devices, such as small-cell base stations and tablet computers, and combines a dual-port polarized antenna with a self-tunable cancellation circuit. The second design proposal targets even more compact radio devices such as smartphones and sensor network nodes. This design builds on a tunable electrical balance isolator/duplexer in combination with a single-port miniature antenna. The electrical balance circuit can be implemented for scaled CMOS technology, facilitating low cost and dense integration.

Analog/RF Solutions Enabling Compact Full-Duplex Radios

39th European Microwave Integrated Circuits Conference, 2009 (EuMIC 2009), Rome, Italy

The theory of inverse Doherty has been introduced. An experimental optimization technique has verified that the current requirement for inverse load modulation is less than classical load modulation in three different implementations where the peak is smaller than the carrier. The drain efficiency performance of inverse Doherty outperforms most recently published Doherty publications at large output power back-off levels. The 2.05GHz configuration achieves 48%, 33% and 17% at 10, 15 and 20dB output power back-off. The efficiency results can be improved by designing a dedicated inverse Doherty PA.

The inverse Doherty amplifier using a reduced peaking amplifier drain supply voltage

There is now significant interest in the use of signal cancellation based architectures in an attempt to replace frequency domain filtering within the duplexing function for next generation wireless transceivers. This approach can potentially eliminate the need for band specific filters, which inhibits global operation of LTE handsets due to the diverse band plan. Further, using such methods in-band full-duplex communications is also possible, thus potentially doubling the spectrum efficiency when compared with conventional techniques.

Flexible duplex transceivers for 5G and beyond wireless access

Long Term Evolution (LTE) communications systems are increasingly used for remote applications where a battery life of at least ten years is often required. Numerous technologies have been proposed to increase the efficiency of this standard, particularly the power amplifier, however these tend to involve resource intensive signal processing, together with a higher component count. This paper presents the use of a low speed load pull technique, with and without a dynamic power supply system in order to optimise performance. This system was tested with LTE signals and appropriate hardware, providing up to 44% increase in power-added efficiency for the fixed supply voltage case and a 27% increase over basic dynamic power supply architectures whilst maintaining ACLR and EVM performance.

/pdf/efficiency-enhancement-of-m2m-communications-over-lte-using-vziyu2uduk.pdf

Efficiency enhancement of M2M communications over LTE using adaptive load pull techniques

The design of a high impedance, high Q tunable load is presented with operating frequency between 400MHz and close to 6GHz. The bandwidth is made independently tunable of the carrier frequency by using an active inductor resonator with multiple tunable capacitances. The Q factor can be tuned from a value 40 up to 300. The circuit is targeted at 5G wideband applications requiring narrow band filtering where both centre frequency and bandwidth needs to be tunable. The circuit impedance is applied to the output stage of a standard CMOS cascode and results show that high Q factors can be achieved close to 6GHz with 11dB rejection at 20MHz offset from the centre frequency. The circuit architecture takes advantage of currently available low cost, low area tunable capacitors based on micro-electromechanical systems (MEMS) and Barium Strontium Titanate (BST).

Kevin A. Morris

Papers

39th European Microwave Integrated Circuits Conference, 2009 (EuMIC 2009), Rome, Italy

The inverse Doherty amplifier using a reduced peaking amplifier drain supply voltage

Flexible duplex transceivers for 5G and beyond wireless access

Efficiency enhancement of M2M communications over LTE using adaptive load pull techniques

A 0.4–6GHz CMOS tunable load with independent Q tuning for 5G filtering applications