https://www.cell.com/joule/pdfExtended/S2542-4351(20)30035-0

Blade-Coated Perovskites on Textured Silicon for 26%-Efficient Monolithic Perovskite/Silicon Tandem Solar Cells

Silicon wafer solar cells continue to be the leading photovoltaic technology, and in many places are now providing a substantial portion of electricity generation. Further adoption of this technology will require processing that minimises losses in device performance. A fundamental mechanism for efficiency loss is the recombination of photo-generated charge carriers at the unavoidable cell surfaces. Dielectric coatings have been shown to largely prevent these losses through a combination of different passivation mechanisms. This review aims to provide an overview of the dielectric passivation coatings developed in the past two decades using a standardised methodology to characterise the metrics of surface recombination across all techniques and materials. The efficacy of a large set of materials and methods has been evaluated using such metrics and a discussion on the current state and prospects for further surface passivation improvements is provided.

/pdf/dielectric-surface-passivation-for-silicon-solar-cells-a-zv6y6fla1t.pdf

Dielectric surface passivation for silicon solar cells: A review

Hydrogenated Amorphous Silicon

Crystalline silicon surface passivation by amorphous silicon deposited by three different chemical vapor deposition (CVD) techniques at low (T∼130 °C) temperatures is compared. For all three techniques, surface recombination velocities (SRVs) are reduced by two orders of magnitude after prolonged thermal annealing at 200 °C. This reduction correlates with a decreased dangling bond density at the amorphous-crystalline interface, indicating that dangling bond saturation is the predominant mechanism. All three deposition methods yield excellent surface passivation. For a-Si:H layers deposited by radio frequency plasma enhanced CVD, we obtain outstanding carrier lifetimes of 10.3 ms, corresponding to SRVs below 1.32 cm/s.

/pdf/excellent-crystalline-silicon-surface-passivation-by-1rmlbge0uv.pdf

Excellent crystalline silicon surface passivation by amorphous silicon irrespective of the technique used for chemical vapor deposition

High-efficiency Si solar cells have attracted great attention from researchers, scientists, engineers of photovoltaic (PV) industry for the past few decades. Many researchers, scientists, and engineers in both academia and industry seek solutions to improve the cell efficiency and reduce the cost. This desire has drawn stronger support from major funding agencies and industry and stimulated a growing number of major research and research infrastructure programs, and a rapidly increasing number of publications in this filed. This article reviews materials, devices, and physics of high-efficiency Si solar cells developed over the last 20 years and presents representative examples of superior performances and competitive advantages. In this paper there is a fair number of topics, not only from the material viewpoint, introducing various materials that are required for high-efficiency Si solar cells, such as base materials (FZ-Si, CZ-Si, MCZ-Si, and multi-Si), emitter materials (diffused emitter and deposited...

High-Efficiency Silicon Solar Cells—Materials and Devices Physics

Catalytic chemical vapor deposition (Cat-CVD), also called hot-wire CVD, yields silicon-nitride/amorphous-silicon (SiNx/a-Si) stacked layers with remarkably low surface recombination velocities (SRVs) of lower than 1.5 cm/s for n-type crystalline Si (c-Si) wafers, and lower than 9.0 cm/s for p-type wafers. The temperature throughout the formation of stacked layers is lower than 250 °C. The usage of a-Si films significantly enhances the effective carrier lifetime of c-Si wafers, and SiNx films are also essential for reducing SRVs to such low levels.

Extremely low surface recombination velocities on crystalline silicon wafers realized by catalytic chemical vapor deposited SiNx/a-Si stacked passivation layers

Phosphorus (P) or boron (B) atoms can be doped at temperatures as low as 80 to 350 °C, when crystalline silicon (c-Si) is exposed only for a few minutes to species generated by catalytic cracking reaction of phosphine (PH3) or diborane (B2H6) with heated tungsten (W) catalyzer. This paper is to investigate systematically this novel doping method, “Cat-doping”, in detail. The electrical properties of P or B doped layers are studied by the Van der Pauw method based on the Hall effects measurement. The profiles of P or B atoms in c-Si are observed by secondary ion mass spectrometry mainly from back side of samples to eliminate knock-on effects. It is confirmed that the surface of p-type c-Si is converted to n-type by P Cat-doping at 80 °C, and similarly, that of n-type c-Si is to p-type by B Cat-doping. The doping depth is as shallow as 5 nm or less and the electrically activated doping concentration is 1018 to 1019 cm-3 for both P and B doping. It is also found that the surface potential of c-Si is controlled by the shallow Cat-doping and that the surface recombination velocity of minority carriers in c-Si can be enormously lowered by this potential control.

Cat-doping: Novel method for phosphorus and boron shallow doping in crystalline silicon at 80 °C

Drastic reduction in surface recombination velocity of crystalline silicon by surface treatment using catalytically-generated radicals

Extremely low recombination velocity on crystalline silicon surfaces realized by low-temperature impurity doping in Cat-CVD technology

https://dspace.jaist.ac.jp/dspace/bitstream/10119/10675/1/17695.pdf

Koichi Koyama

Papers

Extremely low surface recombination velocities on crystalline silicon wafers realized by catalytic chemical vapor deposited SiNx/a-Si stacked passivation layers

Cat-doping: Novel method for phosphorus and boron shallow doping in crystalline silicon at 80 °C

Drastic reduction in surface recombination velocity of crystalline silicon by surface treatment using catalytically-generated radicals

Extremely low recombination velocity on crystalline silicon surfaces realized by low-temperature impurity doping in Cat-CVD technology

Passivation characteristics of SiNx/a-Si and SiNx/Si-rich-SiNx stacked layers on crystalline silicon