Memristive devices are electrical resistance switches that can retain a state of internal resistance based on the history of applied voltage and current. These devices can store and process information, and offer several key performance characteristics that exceed conventional integrated circuit technology. An important class of memristive devices are two-terminal resistance switches based on ionic motion, which are built from a simple conductor/insulator/conductor thin-film stack. These devices were originally conceived in the late 1960s and recent progress has led to fast, low-energy, high-endurance devices that can be scaled down to less than 10 nm and stacked in three dimensions. However, the underlying device mechanisms remain unclear, which is a significant barrier to their widespread application. Here, we review recent progress in the development and understanding of memristive devices. We also examine the performance requirements for computing with memristive devices and detail how the outstanding challenges could be met.

Memristive devices for computing

In this paper, recent progress of binary metal-oxide resistive switching random access memory (RRAM) is reviewed. The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide RRAM are discussed, with a focus on the use of RRAM for nonvolatile memory application. A review of recent development of large-scale RRAM arrays is given. Issues such as uniformity, endurance, retention, multibit operation, and scaling trends are discussed.

Metal–Oxide RRAM

Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

Training and operation of an integrated neuromorphic network based on metal-oxide memristors

Processing-in-memory (PIM) is a promising solution to address the "memory wall" challenges for future computer systems. Prior proposed PIM architectures put additional computation logic in or near memory. The emerging metal-oxide resistive random access memory (ReRAM) has showed its potential to be used for main memory. Moreover, with its crossbar array structure, ReRAM can perform matrix-vector multiplication efficiently, and has been widely studied to accelerate neural network (NN) applications. In this work, we propose a novel PIM architecture, called PRIME, to accelerate NN applications in ReRAM based main memory. In PRIME, a portion of ReRAM crossbar arrays can be configured as accelerators for NN applications or as normal memory for a larger memory space. We provide microarchitecture and circuit designs to enable the morphable functions with an insignificant area overhead. We also design a software/hardware interface for software developers to implement various NNs on PRIME. Benefiting from both the PIM architecture and the efficiency of using ReRAM for NN computation, PRIME distinguishes itself from prior work on NN acceleration, with significant performance improvement and energy saving. Our experimental results show that, compared with a state-of-the-art neural processing unit design, PRIME improves the performance by ~2360× and the energy consumption by ~895×, across the evaluated machine learning benchmarks.

PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory

This review article attempts to provide a comprehensive review of the recent progress in the so-called resistive random access memories (RRAMs) First, a brief introduction is presented to describe the construction and development of RRAMs, their potential for broad applications in the fields of nonvolatile memory, unconventional computing and logic devices, and the focus of research concerning RRAMs over the past decade Second, both inorganic and organic materials used in RRAMs are summarized, and their respective advantages and shortcomings are discussed Third, the important switching mechanisms are discussed in depth and are classified into ion migration, charge trapping/de-trapping, thermochemical reaction, exclusive mechanisms in inorganics, and exclusive mechanisms in organics Fourth, attention is given to the application of RRAMs for data storage, including their current performance, methods for performance enhancement, sneak-path issue and possible solutions, and demonstrations of 2-D and 3-D crossbar arrays Fifth, prospective applications of RRAMs in unconventional computing, as well as logic devices and multi-functionalization of RRAMs, are comprehensively summarized and thoroughly discussed The present review article ends with a short discussion concerning the challenges and future prospects of the RRAMs

Recent progress in resistive random access memories: Materials, switching mechanisms, and performance

Nonvolatile memories with fast write operation at low voltage are required as storage devices to exceed flash memory performance [1–3]. We develop an 8Mb multi-layered cross-point ReRAM macro with 443MB/s write throughput (64b parallel write per 17.2ns cycle), which is almost twice as fast as existing methods, using the fast-switching performance of TaO x ReRAM [4] and the following three techniques to reduce the sneak current in bipolar type cross-point cell array structure in an 0.18μm process. First, memory cell and array technologies reduce the sneak current with a newly developed bidirectional diode as a memory cell select element for the first time. Second, we use a hierarchical bitline (BL) structure for multi-layered cross-point memory with fast and stable current control. Third, we implement a multi-bit write architecture that realizes fast write operation and suppresses sneak current. This work is applicable to both high-density stand-alone and embedded memory with more stacked memory arrays and/or scaling memory cells.

An 8 Mb Multi-Layered Cross-Point ReRAM Macro With 443 MB/s Write Throughput

Resistive RAM (ReRAM) has been recently developed for applications that require higher speed and lower voltage than Flash memory is able to provide. One of the applications is micro-controller units (MCUs) or SoCs with several megabits of embedded ReRAM. Another is solid-state drives (SSDs) where a combination of higher-density ReRAM and NAND flash memory would achieve high-performance and high-reliability storage [1], suitable for server applications for future cloud computing. ReRAM is attractive for several reasons. First, it operates at high speed and low voltage. Second, it enables high density due to the simple structure of the resistive element (RE) [2]. Third, it is immune to external environment such as magnetic fields or radiation, since the resistive switching is based on the redox reaction [3].

Filament scaling forming technique and level-verify-write scheme with endurance over 107 cycles in ReRAM

Aostract is ReRAM mereasmgiy being developed for applications that require higher speeds and lower voltages than flash memory We have found TaOx to have high performance and high reliability However one of the phenomena observed in ReRAM is that each resistance after Set and Reset varies during every cycle To stabilize resistive switching, the key is to limit these variations in resistance In ReRAM, a conductive filament (CF) is created by the forming pulse Resistive switching in the CF is based on reduction and oxidization using this voltage pulse This paper reviews a hopping percolation model which we have proposed for the switching process, and this paper proposes an automatic forming circuit using our newly-developed externally-scalable forming pulse (ESF) scheme In this CF model, conductive paths show different conductivities caused by the formation of different percolation networks that link hopping sites Larger CFs show greater variation in resistance due to the many possible combinations of percolation networks This makes it important to develop a forming technique that limits CFs to their optimal size Forming is based on dielectric breakdown, so the pulse width ranges over approximately three orders The automatic forming circuit detects, bit by bit, whether forming is over, and stops the forming pulse after a specified period A forming pulse is then generated, using an external clock, to cover the range of pulse widths This allows the filament size to be controlled to ensure it is uniform for all of the bits in the circuit, at the cost of only a small area overhead

Highly-reliable TaOx reram technology using automatic forming circuit

Provided is a variable resistance nonvolatile memory device that achieves, in multi-bit simultaneous writing for increasing a writing speed, writing with little variation caused by positions of memory cells in multi-bit simultaneous writing. The variable resistance nonvolatile memory device includes bit lines, word lines, memory cells, a first write circuit (e.g., a write circuit ( 60 - 0 )), a second write circuit (e.g., a write circuit ( 60 -k−1)), a first selection circuit (e.g., a selection circuit (S 0 — 0 )), a second selection circuit (e.g., a selection circuit (S 0 _k−1)), and a first word line drive circuit (a word line drive circuit ( 40 - 1 )), wherein the first selection circuit (e.g., an NMOS transistor (TS 0 — 0 — 0 to TS 0 — 0 _m−1) included in the selection circuit) has a greater ON resistance than the second selection circuit (e.g., an NMOS transistor (TS 0 _k−1 — 0 to TS 0 _k−1_m−1) included in the selection circuit) does.

Variable resistance nonvolatile memory device and method of writing thereby

Disclosed is a resistance change type nonvolatile storage device in which, in simultaneous writing of a large number of bits, with the aim of improving writing speed, writing is achieved with little variability due to the position of the memory cell. This resistance change type nonvolatile storage device comprises: a plurality of bit lines, a plurality of word lines, a plurality of memory cells, a first write circuit (for example 60-0), a second write circuit (for example 60-k-1), a first selection circuit (for example S0_0), a second selection circuit (for example S0_k-1) and a word line drive circuit (40-1). The ON resistance value of the transistor in the first selection circuit (for example, TS0＿0＿0 to TS0＿0＿m-1) is larger than the ON resistance value of the transistor in the second selection circuit (for example TS0＿k-1＿0 to TS0＿k-1＿m-1).

Kouhei Tanabe

Papers

An 8 Mb Multi-Layered Cross-Point ReRAM Macro With 443 MB/s Write Throughput

Filament scaling forming technique and level-verify-write scheme with endurance over 107 cycles in ReRAM

Highly-reliable TaOx reram technology using automatic forming circuit

Variable resistance nonvolatile memory device and method of writing thereby

Resistance change type nonvolatile storage device and method of writing the same