L
Laung-Terng Wang
Researcher at Kyushu Institute of Technology
Publications - 80
Citations - 2958
Laung-Terng Wang is an academic researcher from Kyushu Institute of Technology. The author has contributed to research in topics: Automatic test pattern generation & Fault coverage. The author has an hindex of 28, co-authored 80 publications receiving 2927 citations. Previous affiliations of Laung-Terng Wang include Stanford University.
Papers
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Proceedings ArticleDOI
CSER: BISER-based concurrent soft-error resilience
TL;DR: This paper presents a concurrent soft-error resilience (CSER) scheme with features that aid manufacturing test, online debug, and defect tolerance capabilities and the cell-level area, power, and performance overhead of the robust CSER cells were found to be generally within 1% to 22% of the BISER cell.
Patent
Method and apparatus for hybrid ring generator design
Laung-Terng Wang,Nur A. Touba +1 more
TL;DR: In this paper, a pseudorandom sequence using a hybrid ring generator with low hardware cost is presented. But the complexity of the hybrid ring generators is not addressed, and it is not shown how to construct the generator in practice.
Journal ArticleDOI
Launch-on-Shift Test Generation for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains
Shianling Wu,Laung-Terng Wang,Xiaoqing Wen,Wen-Ben Jone,Michael S. Hsiao,Fangfang Li,James Chien-Mo Li,Jiun-Lang Huang +7 more
TL;DR: A hybrid Automatic Test Pattern Generation (ATPG) technique using the staggered Launch-On-Shift (LOS) scheme followed by the one-hot launch-on-shift scheme for testing delay faults in a scan design containing asynchronous clock domains is presented.
Proceedings ArticleDOI
Analysis of Resistive Bridging Defects in a Synchronizer
TL;DR: Fault modeling and analysis for resistive bridging defects in a synchronizer constructed with two D flip-flops and HSPICE is used to perform circuit analysis.
Proceedings ArticleDOI
On Achieving Capture Power Safety in At-Speed Scan-Based Logic BIST
A. Tomita,Xiaoqing Wen,Yasuo Sato,Seiji Kajihara,Patrick Girard,Mark Tehranipoor,Laung-Terng Wang +6 more
TL;DR: This paper is the first that has explicitly focused on achieving capture power safety with a practical scheme called capture-power-safe BIST (CPS-BIST).