L
Luciano Lavagno
Researcher at Polytechnic University of Turin
Publications - 323
Citations - 9786
Luciano Lavagno is an academic researcher from Polytechnic University of Turin. The author has contributed to research in topics: Asynchronous communication & Software. The author has an hindex of 46, co-authored 318 publications receiving 9485 citations. Previous affiliations of Luciano Lavagno include Lawrence Berkeley National Laboratory & University of Udine.
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Hardware-software co-design of embedded systems: the POLIS approach
Felice Balarin,Massimiliano Chiodo,Paolo Giusto,Harry Hsieh,Attila Jurecska,Luciano Lavagno,Claudio Passerone,Alberto Sangiovanni-Vincentelli,Ellen M. Sentovich,Kei Suzuki,Bassam Tabbara +10 more
TL;DR: This paper is intended to give a complete overview of the POLIS system including its formal and algorithmic aspects and will be of interest to embedded system designers (automotive electronics, consumer electronics and telecommunications), micro-controller designers, CAD developers and students.
Journal ArticleDOI
Metropolis: an integrated electronic system design environment
Felice Balarin,Y. Watanabe,H. Hsieh,Luciano Lavagno,Claudio Passerone,Alberto Sangiovanni-Vincentelli +5 more
TL;DR: Based on a metamodel with formal semantics that developers can use to capture designs, Metropolis provides an environment for complex electronic-system design that supports simulation, formal analysis, and synthesis.
Journal ArticleDOI
Design of embedded systems: formal models, validation, and synthesis
TL;DR: This paper addresses the design of reactive real-time embedded systems by reviewing the variety of approaches to solving the specification, validation, and synthesis problems for such embedded systems.
BookDOI
Hardware-software co design of embedded systems
Felice Balarin,Massimiliano Chiodo,Paolo Giusto,Harry Hsieh,Attila Jurecska,Luciano Lavagno,Claudio Passerone,Alberto Sangiovanni-Vincentelli,Ellen M. Sentovich,Kei Suzuki,Bassam Tabbara +10 more
Journal Article
Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers
TL;DR: Petrify as discussed by the authors is a tool for manipulating concurrent specifications and synthesis and optimization of asynchronous control circuits given a Petri Net (PN), a Signal Transition Graph (STG), or a Transition System (TS) it generates another PN or STG which is simpler than the original description and produces an optimized net-list of an asynchronous controller in the target gate library.