Before the emergence of ultra-wideband (UWB) radios, widely used wireless communications were based on sinusoidal carriers, and impulse technologies were employed only in specific applications (e.g. radar). In 2002, the Federal Communication Commission (FCC) allowed unlicensed operation between 3.1–10.6 GHz for UWB communication, using a wideband signal format with a low EIRP level (−41.3dBm/MHz). UWB communication systems then emerged as an alternative to narrowband systems and significant effort in this area has been invested at the regulatory, commercial, and research levels.

IEEE Transactions on Microwave Theory and Techniques and Antennas and Propagation Announce a Joint Special Issue on Ultra-Wideband (UWB) Technology

This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

This work presents and analyzes the design of a 1-V ultra-low power, compact, and wideband low-noise amplifier (LNA). The proposed LNA uses common-gate (CG) NMOS and PMOS transistors as input devices in a complementary current-reuse structure. Low power input matching is achieved by employing an active shunt-feedback architecture while the current of the feedback stage is also reused by the input transistor to improve the current efficiency of the LNA. A forward body biasing (FBB) scheme is exploited to tune the feedback coefficient. The complementary characteristics of the input stage leads to partial second-order distortion cancellation. The proposed inductorless LNA is implemented in an IBM 0.13- $\mu {\text {m}}~1$ P8M CMOS technology and occupies only $0.0052~{\text {mm}}^{2}$ . The measured LNA has a 12.3-dB gain 4.9-dB minimum noise figure (NF) input referred third-order intercept point (IIP3) of −10 dBm and 0.1–-2.2 GHz bandwidth (BW), while consuming only 400 $\mu {\text {A}}$ from a 1-V supply.

An Ultra-Low-Power Wideband Inductorless CMOS LNA With Tunable Active Shunt-Feedback

This paper presents a fully integrated low-power 130-nm CMOS transceiver tailored to the Bluetooth low energy (BLE) standard. The receiver employs a passive front-end zero-IF architecture, which is directly driven by a quadrature voltage-controlled oscillator (QVCO) without any buffering stage. The QVCO, embedded in a fractional- $N$ phase-locked loop (PLL), employs a passive $RC$ network to cancel the parasitic magnetic coupling between the two cores so as to keep the quadrature phase error below 1.5 $^{\circ}$ . The PLL exhibits a high loop bandwidth of 1 MHz to sufficiently reduce the frequency pulling effects due to close-by interferers. The transmitter uses a direct-modulation Gaussian frequency-shift keying scheme in which small PMOS-based cells modulate the output signal of one of the cores of the QVCO. In the baseband section, the transceiver employs a 4-bit phase-domain ADC based on novel linear-combiner topology to generate the required phase rotations. The proposed combiner operates in current domain and does not employ resistors, leading to a power- and area-efficient demodulator implementation. The complete receiver achieves a sensitivity of ${-}$ 81.4 dBm and fulfills the BLE requirements on interference blocking. It consumes 1.1 mW from a 1.0-V supply and has a similar power efficiency as recent super-regenerative receivers that are much more susceptible to interferers. The transmitter delivers 1.6-dBm output power to a differential 100 $\Omega$ and consumes 5.9 mW, which implies a total efficiency of 24.5%.

A 1.1-mW-RX ${-}{\hbox{81.4}}$ -dBm Sensitivity CMOS Transceiver for Bluetooth Low Energy

This paper presents a generic-purpose solution of highly power-efficient active-RC filters, which is suitable for analog baseband with wide bandwidth-range from several mega-Hz to hundreds of mega-Hz in wireless receivers. A 260 μA 7-20 MHz 6th-order active-RC low-bandwidth low-pass filter (LBW-LPF) and a 2.3 mA 240-500 MHz 6th-order active-RC high-bandwidth low-pass filter (HBW-LPF) are implemented in a standard 0.18 μm CMOS process to demonstrate this versatile solution. Highly power-efficient push-pull opamps with 30-to-35 dB gain are adopted for the filters, which allow us to focus on extending the bandwidth and reducing the power consumption. The push-pull opamp with adaptive-biased and pole-cancellation push-pull source follower (APP-SF) as the buffer stage is proposed to greatly reduce the power consumption and effectively extend the bandwidth. An adaptive bias mechanism is also proposed to tolerate the PVT variations for the opamps. In addition, the GBW compensation and the Q-degrading scheme are adopted to relax the opamp GBW requirement, further reducing the power dissipation. The LBW-LPF only consumes 260 μA current from 1.8 V supply, achieves 14.4 dBm in-band IIP3 and 66.2 nV/√ Hz IRN density, and occupies 0.21 mm 2 silicon area without pads. The HBW-LPF merely dissipates 2.3 mA current from 1.8 V supply, achieves 11.3 dBm in-band IIP3 and 13.1 nV/√ Hz IRN density, and occupies 0.23 mm 2 silicon area without pads.

Highly Power-Efficient Active-RC Filters With Wide Bandwidth-Range Using Low-Gain Push-Pull Opamps

An ultra-low-power 401-406-MHz Medical Device Radiocommunications Service receiver RF front-end for biomedical telemetry applications is implemented using 0.18-μm CMOS technology. A single-ended complementary current-reuse low-noise amplifier (CCRLNA) is proposed that achieves a power gain of 20 dB, noise figure (NF) of 2.8 dB, IIP3 of -8.1 dBm, and second-order intercept point of +34 dBm while consuming only 150 μW at 1-V supply voltage. The total receiver RF front-end, including the proposed CCRLNA, in-phase/quadrature folded mixers, and local oscillator buffers, achieves a conversion gain of 28.7 dB, NF of 5.5 dB, and third-order intercept point of -25 dBm while consuming less than 500 μW from a 1-V supply voltage and occupying 0.7 mm2 of core die area.

A CMOS MedRadio Receiver RF Front-End With a Complementary Current-Reuse LNA

This paper demonstrates a highly integrated transceiver for 802.15.4, consuming a dc power of 18 mW and 22.3 mW in the Tx and Rx mode respectively. The g m boosted LNA shares the dc current with mixer, complex filter uses transistorized biquads, Limiting Amplifier and RSSI chain uses two local loops to save dc power. In the Tx, 2-point direct FSK modulation using normal sized varactors are used in the PLL, which not only obviates the need for auto calibration but also saves dc power due to the absence of DAC. The low IF receiver achieves a sensitivity of −94 dBm, an over load point of −20 dBm adjacent and alternate channel rejections of 40 dB and 55 dB respectively and a linear RSSI range of 89 dB. The transmitter delivers an OQPSK modulated signal of 0 dBm, with an EVM of 7% and the output spectrum meets the mask requirements of 802.15.4, FCC & ETSI. Implemented in 0.18-µm CMOS, loop filter and the crystal resonator for the PLL are the only external components apart from the decoupling capacitors.

A 18 mW Tx, 22 mW Rx transceiver for 2.45 GHz IEEE 802.15.4 WPAN in 0.18-µm CMOS

In this paper, an innovative design of a miniaturized heterogeneous 3DIC-based wireless sensor node (WSN) is proposed. The design contains stacks of radio frequency (RF) die, mixed-signal die, digital die, and integrated antenna die using the through silicon via (TSV) technology. Significant enhancements to the existing 2D design and verification flow are developed to solve the critical concerns of heterogeneous 3DIC integration, including the block-level partitioning, TSV macro design, the TSV-related modeling and characterization, and physical verification. Solutions are proposed to minimize the electromagnetic interference (EMI) effects between the IC and the antenna. The size of the proposed 3DIC is only 66% as compared to a similar 2D implementation, permitting miniaturization of the complete WSN system.

A miniaturized heterogeneous wireless sensor node in 3DIC

An ultra-low-power 401–406 MHz Medical Device Radiocommunication Service (MedRadio) receiver RF front-end for biomedical telemetry applications is implemented using 0.18-μm CMOS technology with a 1-V supply voltage. The receiver RF front-end employs the proposed complementary current-reuse low-noise amplifier (CCRLNA) which shows enhanced noise and linearity performance in comparison to the well-known source degeneration cascode LNA at equal power consumption and design conditions. The RF front-end including the proposed CCRLNA, transconductor, I/Q folded mixer, and LO buffers achieves a conversion gain of 28.7 dB, NF of 5.5 dB, and IIP3 of −25 dBm while consuming less than 500μ\ν from a 1-V supply voltage and occupying 0.7mm2 of core die area.

A CMOS MedRadio receiver RF front-end with complementary current-reuse LNA for biomedical applications

This paper presents a fully integrated low cost, low noise 10GHz synthesizer using 65nm RF CMOS process. The synthesizer provide low phase-noise and low reference spur, covering 8.3GHz to 11.3GHz using multiband low gain VCO with auto calibration for locking. The measured phase-noise of 9.75GHz is −77dBc/Hz at lKHz offset, −90.1dBc/Hz at 10KHz offset, −98.6dBc/Hz at 100KHz offset, and −112.5dBc/Hz at 1MHz offset, phase RMS jitter performance is to be less than 1.1° integrated from lKHz to 1MHz, while maintaining 26MHz reference spur levels lowers −74.6dB cover the entire tuning range. The active die area is 0.55mm × 0.8mm. The chip operates over a wide range of supply voltage from 1.1 V to 1.3V and temperature from −40°C to +85°C respectively. The chip draws 31mA current with buffer from a +1.2V supply at +25°C.

M. Kumarasamy Raja

Papers

A CMOS MedRadio Receiver RF Front-End With a Complementary Current-Reuse LNA

A 18 mW Tx, 22 mW Rx transceiver for 2.45 GHz IEEE 802.15.4 WPAN in 0.18-µm CMOS

A miniaturized heterogeneous wireless sensor node in 3DIC

A CMOS MedRadio receiver RF front-end with complementary current-reuse LNA for biomedical applications

A 8.3–11.3GHz low cost integer-N synthesizer with 1.1° RMS phase error in 65nm CMOS