There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

Wireless indoor positioning systems have become very popular in recent years. These systems have been successfully used in many applications such as asset tracking and inventory management. This paper provides an overview of the existing wireless indoor positioning solutions and attempts to classify different techniques and systems. Three typical location estimation schemes of triangulation, scene analysis, and proximity are analyzed. We also discuss location fingerprinting in detail since it is used in most current system or solutions. We then examine a set of properties by which location systems are evaluated, and apply this evaluation method to survey a number of existing systems. Comprehensive performance comparisons including accuracy, precision, complexity, scalability, robustness, and cost are presented.

Survey of Wireless Indoor Positioning Techniques and Systems

National Institute of Standards and Technology における超伝導研究及び生活

We present a new block cipher LED. While dedicated to compact hardware implementation, and offering the smallest silicon footprint among comparable block ciphers, the cipher has been designed to simultaneously tackle three additional goals. First, we explore the role of an ultra-light (in fact non-existent) key schedule. Second, we consider the resistance of ciphers, and LED in particular, to related-key attacks: we are able to derive simple yet interesting AES-like security proofs for LED regarding related- or single-key attacks. And third, while we provide a block cipher that is very compact in hardware, we aim to maintain a reasonable performance profile for software implementation.

The LED block cipher

In this paper we propose a new family of very efficient hardware oriented block ciphers. The family contains six block ciphers divided into two flavors. All block ciphers share the 80-bit key size and security level. The first flavor, KATAN, is composed of three block ciphers, with 32, 48, or 64-bit block size. The second flavor, KTANTAN, contains the other three ciphers with the same block sizes, and is more compact in hardware, as the key is burnt into the device (and cannot be changed).

The smallest cipher of the entire family, KTANTAN32, can be implemented in 462 GE while achieving encryption speed of 12.5 KBit/sec (at 100 KHz). KTANTAN48, which is the version we recommend for RFID tags uses 588 GE, whereas KATAN64, the largest and most flexible candidate of the family, uses 1054 GE and has a throughput of 25.1 Kbit/sec (at 100 KHz).

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KATAN and KTANTAN -- A Family of Small and Efficient Hardware-Oriented Block Ciphers

Wireless sensor network (WSN) is a technology comprising even thousands of autonomic and self-organizing nodes that combine environmental sensing, data processing, and wireless multihop ad-hoc networking. The features of WSNs enable monitoring, object tracking, and control functionality. The potential applications include environmental and condition monitoring, home automation, security and alarm systems, industrial monitoring and control, military reconnaissance and targeting, and interactive games. This chapter describes low-power WSN as a platform for signal processing by presenting the WSN services that can be used as building blocks for the applications. It explains the implications of resource constraints and expected performance in terms of throughput, reliability and latency.

Low-Power Wireless Sensor Network Platforms

Traditional betting systems do not enable betting in real-time during an event and require decisions and preparations beforehand. In this paper a novel architecture for real-time betting is presented. It disposes of the up-front effort and enables frequent bet announcements and placements during an ongoing event. The novel situation is achieved by broadcasting announcements, time-stamping and storing the placements locally, and collecting them after the event has been finished. While solving the processing problems, the architecture requires reliable cryptographic and physical protection. Currently, e.g. DVB and LAN technologies offer potential platforms for providing the service. The implemented LAN demonstrator has shown that user interfaces have to be simple and bets should not be announced too often. It has also shown that real-time operation makes betting more inspiring.

Offline architecture for real-time betting

In system-level design, design space exploration (DSE) produces large amounts of data when exploring myriad of alternatives for application mapping and the underlying platform. Visualization of the essential execution data makes the right design decisions essentially easier. This paper presents execution monitor, a versatile monitoring tool implemented in Java, for multi-processor systems-on-chip (MPSoCs). It allows monitoring both the application and the underlying platform in real-time, and also viewing the previously recorded execution trace. Execution monitor can be used both during the simulation and prototyping. Moreover, the designer can rapidly evaluate in run-time the performance of multiple application mappings via intuitive drag-and-drop mechanism. The case study shows that the visualization of the monitored execution data significantly eases optimizing the performance of the video codec after addition of new application functionality.

Real-time execution monitoring on multi-processor system-on-chip

Wireless Sensor Networks (WSNs) comprise embedded sensor nodes that operate autonomously in a multi-hop topology. The challenges are unreliable wireless communications, harsh environment, and limited energy and computation resources. To ensure the desired level of service, it is essential to diagnose performance issues e.g. due to low quality links or energy depletion. This paper presents remote diagnostics and performance analysis that comprise self-diagnostics on embedded sensor nodes, the remote collection of diagnostics, and the design of a diagnostics analysis tool. Unlike the related proposals, our approach allows correcting detected problems by identifying the reasons for misbehavior. The diagnostics is verified with a practical WSN implementation. It has only a small overhead, less than 18 B/min per node in the implementation, allowing the use in bandwidth and energy constrained WSNs.

Remote diagnostics and performance analysis for a wireless sensor network

Computing modular exponentiations with long integers is required in a number of security protocols Since security procedures typically consume large amount of processing capacity in network devices, efficient implementations are needed As a solution, this paper presents an exponentiation accelerator suited for efficient processing in security protocols using public key schemes, such as TLS and IPsec The accelerator is implemented on a system-on-a-programmable-chip, partitioned into software control and hardware processing Compared to previous radix-2 designs, significantly higher performance is achieved The design computes a full exponentiation in (n+k)(n+4) clock cycles, in which n is the bit length of the modulus and the exponent and k is the number of ones in the binary representation of the exponent In the average case, the design executes the exponentiation 25% faster than the previous hardware designs at equal clock speeds The proposed exponentiation control and 1-cycle processing mode can also be utilized for improving higher radix designs

Marko Hännikäinen

Papers

Low-Power Wireless Sensor Network Platforms

Offline architecture for real-time betting

Real-time execution monitoring on multi-processor system-on-chip

Remote diagnostics and performance analysis for a wireless sensor network

Acceleration of Modular Exponentiation on System-on-a-Programmable-Chip