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Showing papers by "Matteo Perenzoni published in 2011"


Journal ArticleDOI
TL;DR: In this paper, a lock-in pixel array based on a buried channel photo-detector aimed at time-of-flight range imaging is presented, which provides a stream of three-dimensional images at 5-20 fps on a 3-6 m range, with a linearity error lower than 0.7% and a repeatability of 5-16 cm.
Abstract: This paper presents the design and characterization of a lock-in pixel array based on a buried channel photo-detector aimed at time-of-flight range imaging. The proposed photo-demodulator has been integrated in a 10-μm pixel pitch with a fill factor of 24%, and is capable of a maximum demodulation frequency of 50 MHz with a contrast of 29.5%. The sensor has been fabricated in a 0.18-μm CMOS imaging technology and assembled in a range camera system setup. The system provides a stream of three-dimensional images at 5-20 fps on a 3-6 m range, with a linearity error lower than 0.7% and a repeatability of 5-16 cm, while the best achievable precision is 2.7 cm at a 50-MHz modulation frequency.

80 citations


Journal ArticleDOI
TL;DR: The design and electro-optical test of a 160 × 120-pixels CMOS sensor specifically conceived for Time-Of-Flight 3D imaging is presented, which allows the implementation of Indirect Time-of-Flight technique for distance measurement with reset noise removal through Correlated Double Sampling and embedded fixed-pattern noise reduction.
Abstract: This paper presents the design and electro-optical test of a 160 × 120-pixels CMOS sensor specifically conceived for Time-Of-Flight 3D imaging. The in-pixel processing allows the implementation of Indirect Time-Of-Flight technique for distance measurement with reset noise removal through Correlated Double Sampling and embedded fixed-pattern noise reduction, whereas a fast readout operation allows the pixels values to be streamed out at a maximum rate of 10 MSample/s. The imager can operate as a fast 2D camera up to 458 fps, as a 3D camera up to 80 fps, or even coupling both operation modes. The chip has been fabricated using a standard 0.18 μm 1P4M 1.8 V CMOS technology with MIM capacitors. The resulting pixel has a pitch of 29.1 μm with a fill-factor of 34% and includes 66 transistors. Distance measurements up to 4.5 m have been performed with pulsed laser light, achieving a best precision of 10 cm at 1 m in real-time at 55 fps and 175 mA current consumption.

59 citations


Proceedings ArticleDOI
23 Oct 2011
TL;DR: A new architecture for PET photodetectors based on small-area SiPMs (mini-SiPMs) with individual SPAD digitization and in-pixel data compression is presented, to reduce the electronics area occupation per SPAD and thus improve the fill factor.
Abstract: A new architecture for PET photodetectors based on small-area SiPMs (mini-SiPMs) with individual SPAD digitization and in-pixel data compression is presented The main goal of this architecture is to reduce the electronics area occupation per SPAD and thus improve the fill factor Two compression schemes are described, spatial and temporal compression, and a combination of both is implemented in the pixel Our first chip using this architecture is described, where each pixel contains a mini-SiPM with 32 SPADs, a 4-bit digital counter and individual SPAD SRAMs for disabling high DCR devices The sensor contains a 14 × 10 pixel array for a total of 4480 SPADs, and the achieved fill factor is about 29% The sensor also contains column-level TDCs, which acquire the time of arrival of the first photon in each column The expected compression response of this sensor is presented

45 citations


Journal ArticleDOI
TL;DR: A comprehensive analysis of the implementation possibilities of the I-TOF method is developed in order to model the main performances with a high level of abstraction, and several figures of merit are defined with the purpose of obtaining a common metric.
Abstract: Indirect Time-of-Flight (I-TOF) cameras can be implemented in a number of ways, each with specific characteristics and performances. In this paper a comprehensive analysis of the implementation possibilities is developed in order to model the main performances with a high level of abstraction. After the extraction of the main characteristics for the high-level model, several figures of merit (FoM) are defined with the purpose of obtaining a common metric: noise equivalent distance, correlated and uncorrelated power responsivity, and background light rejection ratio. The obtained FoMs can be employed for the comparison of different implementations of range cameras based on the I-TOF method: specifically, they are applied for several different sensors developed by the authors in order to compare their performances.

25 citations


Proceedings ArticleDOI
03 Jul 2011
TL;DR: A 16 × 16 staring imaging array was implemented in a 0.15-µm standard CMOS technology for terahertz detection in the range of 0.8 THz to 1.5 THz as mentioned in this paper.
Abstract: A 16 × 16 staring imaging array was implemented in a 0.15-µm standard CMOS technology for terahertz detection in the range of 0.8 THz to 1.5 THz. Each pixel is composed of an antenna, a FET detector, and its readout electronics (a current integrator) so that the pixel signals of the whole matrix can be acquired simultaneously. The current integrator employs a 129-dB operational amplifier implementing two offset compensation techniques (chopping and current injection). In order to have a long integration time, the current integration is inserted in a sigma-delta loop. The implemented pixel has a pitch of 120 µm, and the chip total power consumption is below 30 mW.

9 citations


Proceedings ArticleDOI
08 Jun 2011
TL;DR: In this paper, a low-cost integrated microsensor for biomedical applications is proposed, composed by an antenna-coupled microbolometer as detector, which is coupled to a specifically designed integrated circuit for biasing and readout.
Abstract: A low-cost integrated microsensor for biomedical applications is proposed. It is composed by an antenna-coupled microbolometer as detector, which is coupled to a specifically designed integrated circuit for biasing and readout. The main features are fast response to radiation, device level reference sensor, and electronic time-correlation for pulsed sources. The detector and the integrated circuits have been fabricated in a custom MEMS technology and a standard CMOS technology, respectively. First electrical measurements show properly operating devices.

3 citations