An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300/spl deg/C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog VLSI in this temperature range. However practical operation of silicon power devices at ambient temperatures above 200/spl deg/C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.

High-temperature electronics - a role for wide bandgap semiconductors?

Power semiconductor devices are key components in power conversion systems. Silicon carbide (SiC) has received increasing attention as a wide-bandgap semiconductor suitable for high-voltage and low-loss power devices. Through recent progress in the crystal growth and process technology of SiC, the production of medium-voltage (600?1700 V) SiC Schottky barrier diodes (SBDs) and power metal?oxide?semiconductor field-effect transistors (MOSFETs) has started. However, basic understanding of the material properties, defect electronics, and the reliability of SiC devices is still poor. In this review paper, the features and present status of SiC power devices are briefly described. Then, several important aspects of the material science and device physics of SiC, such as impurity doping, extended and point defects, and the impact of such defects on device performance and reliability, are reviewed. Fundamental issues regarding SiC SBDs and power MOSFETs are also discussed.

https://iopscience.iop.org/article/10.7567/JJAP.54.040103/pdf

Material science and device physics in SiC technology for high-voltage power devices

III-V semiconductors have high mobility and will be used in field effect transistors with the appropriate gate dielectric. The dielectrics must have band offsets over 1eV to inhibit leakage. The band offsets of various gate dielectrics including HfO2, Al2O3, Gd2O3, Si3N4, and SiO2 on III-V semiconductors such as GaAs, InAs, GaSb, and GaN have been calculated using the method of charge neutrality levels. Generally, the conduction band offsets are found to be over 1eV, so they should inhibit leakage for these dielectrics. On the other hand, SrTiO3 has minimal conduction band offset. The valence band offsets are also reasonably large, except for Si nitride on GaN and Sc2O3 on GaN which are 0.6–0.8eV. There is reasonable agreement with experiment where it exists, although the GaAs:SrTiO3 case is even worse in experiment.

https://www.researchgate.net/file.PostFileLoader.html?id=53ba3e1fd2fd64bc5d8b4653&assetKey=AS%3A273553407053824%401442231622645

Band offsets of high K gate oxides on III-V semiconductors

The energy distribution of electron states at SiC/SiO 2 interfaces produced by oxidation of various (3C, 4H, 6H) SiC polytypes is studied by electrical analysis techniques and internal photoemission spectroscopy. A similar distribution of interface traps over the SiC bandgap is observed for different polytypes indicating a common nature of interfacial defects. Carbon clusters at the SiC/SiO 2 interface and near-interfacial defects in the SiO 2 are proposed to be responsible for the dominant portion of interface traps, while contributions caused by dopant-related defects and dangling bonds at the SiC surface are not observed.

Intrinsic SiC/SiO2 Interface States

The electronic structure of SiC/SiO2 interfaces was studied for different SiC polytypes (3C, 4H, 6H, 15R) using internal photoemission of electrons from the semiconductor into the oxide. The top of the SiC valence band is located 6 eV below the oxide conduction band edge in all the investigated polytypes, while the conduction band offset at the interface depends on the band gap of the particular SiC polytype. In the energy range up to 1.5 eV above the top of the SiC valence band, interface states were found. Their electron spectrum is similar to that of sp2‐bonded carbon clusters in diamond‐like a‐C:H films suggesting the presence of elemental carbon at the SiC/SiO2 interfaces.

Band offsets and electronic structure of SiC/SiO2 interfaces

Low-temperature electrical measurements and photon-stimulated electron tunneling experiments reveal the presence of a high density of interface states at around 0.1 eV below the conduction band of 4H–SiC at its interface with thermally grown SiO2. These states, related to defects in the near-interfacial oxide layer, trap a considerable density of electrons from the SiC, and are likely responsible for the severe degradation of the electron mobility observed in the surface channel of 4H–SiC/SiO2 devices. The negative impact of the observed defects can be minimized by using SiC modifications (e.g., 6H, 15R, 3C) with a larger conduction band offset with the oxide than 4H–SiC leading to a largely reduced density of electrons trapped in the oxide.

Shallow electron traps at the 4H–SiC/SiO2 interface

The preoxidation cleaning of silicon carbide surfaces (3C, 4H, 6H polytypes) by exposing them to ultraviolet radiation and oxygen is shown to produce a significant improvement in the electronic properties of SiC/SiO2 interfaces. It is found that this treatment results in a removal of defect species, otherwise present at the SiC surface after thermal oxidation of SiC. Carbon clusters are proposed as the attacked species responsible for a substantial part of the SiC/SiO2 interface states.

Elimination of SiC/SiO2 interface states by preoxidation ultraviolet‐ozone cleaning

A tunable optical cavity can be tuned by relative movement between two reflection surfaces, such as by deforming elastomer spacers connected between mirrors or other light-reflective components that include the reflection surfaces. The optical cavity structure includes an analyte region in its light-transmissive region, and presence of analyte in the analyte region affects output light when the optical cavity is tuned to a set of positions. Electrodes that cause deformation of the spacers can also be used to capacitively sense the distance between them. Control circuitry that provides tuning signals can cause continuous movement across a range of positions, allowing continuous photosensing of analyte-affected output light by a detector.

Michael Bassler

Papers

Intrinsic SiC/SiO2 Interface States

Band offsets and electronic structure of SiC/SiO2 interfaces

Shallow electron traps at the 4H–SiC/SiO2 interface

Elimination of SiC/SiO2 interface states by preoxidation ultraviolet‐ozone cleaning

Tuning optical cavities