Ming Li

TL;DR: In this article, reduced graphene oxide (RGO) thin film was used to improve the performance of a low-temperature bonding process based on Cu microcones and Sn/Cu bumps.

TL;DR: In this article, the suppressor PEG can suppress the copper deposition, lengthening the hole close time as to attain more time for the copper filling inside the holes, and further analysis on the current inside and outside the holes.

Abstract: With the increase of system operating frequency and chip switching speed, electro-magnetic interference (EMI) shielding materials were wildly used in chip packaging technology. Packaging manufacturing process which bring cracks from the outer EMI shielding layer into the inner die has important influence on chip quality. In this paper, the influence on manufacturing parameters, such as film thickness and self-annealing time, on film strength were investigated. The microstructure characteristics and properties of copper films under different film thicknesses and self -annealing time were discussed. Microstructural characteristics were analyzed using field emission scanning electron microscopy (FESEM) and film properties were measured by nano-indentation instrument. Experimental results show that the 4um thickness of sputter copper film can achieve the lowest hardness performance and highest young's modulus of 108.3GPa. After 60 hours of self-annealing at room temperature, the grain was more stable than that of electroplated copper. The film thickness was proved to have significant influence on chips mechanical properties. Microstructure characteristics when stainless steel was sputtered on the top layer is discussed.

TL;DR: In this article, a finite element analysis (FEA) simulation has been used to estimate the influence of Al-Cu thin film to the thermal stress of bonding wire, and the results show that insertion of Al 0.5% Cu thin film can improve the reliability of bond wire.

TL;DR: In this article, the authors use TRIZ, an inventive problem solving theory and application tool, to analyze and abstract the major contradictions and then sketch out possible solutions to improve the performance of Stack CSP assembly.