A grand family of two-dimensional (2D) materials and their heterostructures have been discovered through the extensive experimental and theoretical efforts of chemists, material scientists, physicists, and technologists. These pioneering works contribute to realizing the fundamental platforms to explore and analyze new physical/chemical properties and technological phenomena at the micro-nano-pico scales. Engineering 2D van der Waals (vdW) materials and their heterostructures via chemical and physical methods with a suitable choice of stacking order, thickness, and interlayer interactions enable exotic carrier dynamics, showing potential in high-frequency electronics, broadband optoelectronics, low-power neuromorphic computing, and ubiquitous electronics. This comprehensive review addresses recent advances in terms of representative 2D materials, the general fabrication methods, and characterization techniques and the vital role of the physical parameters affecting the quality of 2D heterostructures. The main emphasis is on 2D heterostructures and 3D-bulk (3D) hybrid systems exhibiting intrinsic quantum mechanical responses in the optical, valley, and topological states. Finally, we discuss the universality of 2D heterostructures with representative applications and trends for future electronics and optoelectronics (FEO) under the challenges and opportunities from physical, nanotechnological, and material synthesis perspectives.

2D Heterostructures for Ubiquitous Electronics and Optoelectronics: Principles, Opportunities, and Challenges.

The growth of inch-scale high-quality graphene on insulating substrates is desirable for electronic and optoelectronic applications, but remains challenging due to the lack of metal catalysis. Here we demonstrate the wafer-scale synthesis of adlayer-free ultra-flat single-crystal monolayer graphene on sapphire substrates. We converted polycrystalline Cu foil placed on Al2O3(0001) into single-crystal Cu(111) film via annealing, and then achieved epitaxial growth of graphene at the interface between Cu(111) and Al2O3(0001) by multi-cycle plasma etching-assisted-chemical vapour deposition. Immersion in liquid nitrogen followed by rapid heating causes the Cu(111) film to bulge and peel off easily, while the graphene film remains on the sapphire substrate without degradation. Field-effect transistors fabricated on as-grown graphene exhibited good electronic transport properties with high carrier mobilities. This work breaks a bottleneck of synthesizing wafer-scale single-crystal monolayer graphene on insulating substrates and could contribute to next-generation graphene-based nanodevices. 

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Wafer-scale single-crystal monolayer graphene grown on sapphire substrate

The effective application of graphene and other 2D materials is strongly dependent on the industrial-scale manufacturing of films and powders of appropriate morphology and quality. Here, we discuss three state-of-the-art mass production techniques, their limitations, and opportunities for future improvement. The industrial application of two-dimensional (2D) materials strongly depends on the large-scale manufacturing of high-quality 2D films and powders. Here, the authors analyze three state-of-the art mass production techniques, discussing the recent progress and remaining challenges for future improvements. 

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Large-scale synthesis of graphene and other 2D materials towards industrialization

The evolutionary success in information technology has been sustained by the rapid growth of sensor technology. Recently, advances in sensor technology have promoted the ambitious requirement to build intelligent systems that can be controlled by external stimuli along with independent operation, adaptivity, and low energy expenditure. Among various sensing techniques, field-effect transistors (FETs) with channels made of two-dimensional (2D) materials attract increasing attention for advantages such as label-free detection, fast response, easy operation, and capability of integration. With atomic thickness, 2D materials restrict the carrier flow within the material surface and expose it directly to the external environment, leading to efficient signal acquisition and conversion. This review summarizes the latest advances of 2D-materials-based FET (2D FET) sensors in a comprehensive manner that contains the material, operating principles, fabrication technologies, proof-of-concept applications, and prototypes. First, a brief description of the background and fundamentals is provided. The subsequent contents summarize physical, chemical, and biological 2D FET sensors and their applications. Then, we highlight the challenges of their commercialization and discuss corresponding solution techniques. The following section presents a systematic survey of recent progress in developing commercial prototypes. Lastly, we summarize the long-standing efforts and prospective future development of 2D FET-based sensing systems toward commercialization.

Two-Dimensional Field-Effect Transistor Sensors: The Road toward Commercialization.

Motivated by the high expectation for efficient electrostatic modulation of charge transport at very low voltages, atomically thin 2D materials with a range of bandgaps are investigated extensively for use in future semiconductor devices. However, researchers face formidable challenges in 2D device processing mainly originated from the out-of-plane van der Waals (vdW) structure of ultrathin 2D materials. As major challenges, untunable Schottky barrier height and the corresponding strong Fermi level pinning (FLP) at metal interfaces are observed unexpectedly with 2D vdW materials, giving rise to unmodulated semiconductor polarity, high contact resistance, and lowered device mobility. Here, FLP observed from recently developed 2D semiconductor devices is addressed differently from those observed from conventional semiconductor devices. It is understood that the observed FLP is attributed to inefficient doping into 2D materials, vdW gap present at the metal interface, and hybridized compounds formed under contacting metals. To provide readers with practical guidelines for the design of 2D devices, the impact of FLP occurring in 2D semiconductor devices is further reviewed by exploring various origins responsible for the FLP, effects of FLP on 2D device performances, and methods for improving metallic contact to 2D materials. 

Fermi Level Pinning Dependent 2D Semiconductor Devices: Challenges and Prospects

Chemical vapour deposition of carbon-containing precursors on metal substrates is currently the most promising route for the scalable synthesis of large-area, high-quality graphene films1. However, there are usually some imperfections present in the resulting films: grain boundaries, regions with additional layers (adlayers), and wrinkles or folds, all of which can degrade the performance of graphene in various applications2–7. There have been numerous studies on ways to eliminate grain boundaries8,9 and adlayers10–12, but graphene folds have been less investigated. Here we explore the wrinkling/folding process for graphene films grown from an ethylene precursor on single-crystal Cu–Ni(111) foils. We identify a critical growth temperature (1,030 kelvin) above which folds will naturally form during the subsequent cooling process. Specifically, the compressive stress that builds up owing to thermal contraction during cooling is released by the abrupt onset of step bunching in the foil at about 1,030 kelvin, triggering the formation of graphene folds perpendicular to the step edge direction. By restricting the initial growth temperature to between 1,000 kelvin and 1,030 kelvin, we can produce large areas of single-crystal monolayer graphene films that are high-quality and fold-free. The resulting films show highly uniform transport properties: field-effect transistors prepared from these films exhibit average room-temperature carrier mobilities of around (7.0 ± 1.0) × 103 centimetres squared per volt per second for both holes and electrons. The process is also scalable, permitting simultaneous growth of graphene of the same quality on multiple foils stacked in parallel. After electrochemical transfer of the graphene films from the foils, the foils themselves can be reused essentially indefinitely for further graphene growth. Restricting the initial growth temperatures used for chemical vapour deposition of graphene on metal foils produces optimum conditions for growing large areas of fold-free, single-crystal graphene.

Single-crystal, large-area, fold-free monolayer graphene.

The wet-oxidation of a single crystal Cu(111) foil is studied by growing single crystal graphene islands on it followed by soaking it in water. 18 O-labeled water is also used; the oxygen atoms in the formed copper oxides in both the bare and graphene-coated Cu regions come from water. The oxidation of the graphene-coated Cu regions is enabled by water diffusing from the edges of graphene along the bunched Cu steps, and along some graphene ripples where such are present. This interfacial diffusion of water can occur because of the separation between the graphene and the "step corner" of bunched Cu steps. Density functional theory simulations suggest that adsorption of water in this gap is thermodynamically stable; the "step-induced-diffusion model" also applies to graphene-coated Cu surfaces of various other crystal orientations. Since bunched Cu steps and graphene ripples are diffusion pathways for water, ripple-free graphene is prepared on ultrasmooth Cu(111) surfaces and it is found that the graphene completely shields the underlying Cu from wet-oxidation. This study greatly deepens the understanding of how a graphene-coated copper surface is oxidized, and shows that graphene completely prevents the oxidation when that surface is ultrasmooth and when the graphene has no ripples or wrinkles.

Minhyeok Kim

Papers

Single-crystal, large-area, fold-free monolayer graphene.

The Wet-Oxidation of a Cu(111) Foil Coated by Single Crystal Graphene.