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Nan-Sheng Huang
Researcher at University of Southern Denmark
Publications - 10
Citations - 508
Nan-Sheng Huang is an academic researcher from University of Southern Denmark. The author has contributed to research in topics: Hardware acceleration & Synchronization of chaos. The author has an hindex of 4, co-authored 10 publications receiving 496 citations. Previous affiliations of Nan-Sheng Huang include Maersk & Industrial Technology Research Institute.
Papers
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Journal ArticleDOI
An observer-based approach for chaotic synchronization with applications to secure communications
Teh-Lu Liao,Nan-Sheng Huang +1 more
TL;DR: A systematic approach, based on the linear-state-observer design for constructing two chaotically synchronized systems, is developed and the proposed method is then applied to suggest a means to secure communications.
Patent
Software defined radio (SDR) architecture for wireless digital communication systems
TL;DR: The kernel oriented macro-based software defined radio (SDR) architecture as discussed by the authors provides a configurable and programmable hardware platform to implement multiple wireless communication standards, services and applications, which is a system and method for providing one hardware platform.
Journal ArticleDOI
Control and synchronization of discrete-time chaotic systems via variable structure control technique
The-Lu Liao,Nan-Sheng Huang +1 more
TL;DR: In this article, an input/output linearization control method incorporated in a discrete-time variable structure control technique was proposed to resolve the output tracking problem of a class of discrete time nonlinear systems and applied to address the control and synchronization problems associated with the Henon chaotic systems.
Journal ArticleDOI
Genetic algorithm-based self-learning fuzzy PI controller for buck converter
T.-L. Liao,Nan-Sheng Huang +1 more
TL;DR: This paper presents a self-learning fuzzy proportional-integral (PI) controller design for a buck converter using a genetic algorithm (GA) optimization technique to tune the parameters of normalization factors, membership functions and the gain of PI-like controller.
Proceedings ArticleDOI
Teaching Hardware Implementation of Neural Networks using High-Level Synthesis in Less Than Four Hours for Engineering Education of Intelligent Embedded Computing
TL;DR: The motivation and design of a mini-course to teach hardware implementation of neural networks using high-level synthesis (HLS) in less than four hours for engineering education of intelligent embedded computing is presented.