A metal-semiconductor-metal (M-S-M) model for quantitative analysis of current–voltage (I–V) characteristics of semiconducting nanowires is described and applied to fit experimental I–V curves of Bi2S3 nanowire transistors. The I–V characteristics of semiconducting nanowires are found to depend sensitively on the contacts, in particular on the Schottky barrier height and contact area, and the M-S-M model is shown to be able to reproduce all experimentally observed I–V characteristics using only few fitting variables. A procedure for decoupling contact effects from that of the intrinsic parameters of the semiconducting nanowires, such as conductivity, carrier mobility and doping concentration is proposed, demonstrated using experimental I–V curves obtained from Bi2S3 nanowires and compared with the field-effect based method.

Quantitative Analysis of Current–Voltage Characteristics of Semiconducting Nanowires: Decoupling of Contact Effects

Thin-film transistors (TFTs) made of transparent channel semiconductors such as ZnO are of great technological importance because their insensitivity to visible light makes device structures simple. In fact, there have been several demonstrations of ZnO TFTs achieving reasonably good field effect mobilities of 1–10 cm2/V s, but the overall performance of ZnO TFTs has not been satisfactory, probably due to the presence of dense grain boundaries. We modeled grain boundaries in ZnO TFTs and performed simulation of a ZnO TFT by using a two-dimensional device simulator in order to determine the grain boundary effects on device performance. Polycrystalline ZnO TFT modeling was started by considering a single grain boundary in the middle of the TFT channel, formulated with a Gaussian defect distribution localized in the grain boundary. A double Schottky barrier was formed in the grain boundary, and its barrier height was analyzed as a function of defect density and gate bias. The simulation was extended to TFTs with many grain boundaries to quantitatively analyze the potential profiles that developed along the channel. One of the main differences between a polycrystalline ZnO TFT and a polycrystalline Si TFT is that the much smaller nanoscaled grains in a polycrystalline ZnO TFT induces a strong overlap of the double Schottky barriers with a higher activation energy in the crystallite and a lower barrier potential in the grain boundary at subthreshold or off-state region of its transfer characteristics. Through the simulation, we were able to estimate the density of total trap states localized in the grain boundaries for polycrystalline ZnO TFT by determining the apparent mobility and grain size in the device.

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Modeling and simulation of polycrystalline ZnO thin-film transistors

In order to good interpret the experimentally observed non-ideal Al/SnO2/p-Si (MIS) Schottky diode parameters such as the barrier height ΦB, series resistance Rs and density of interface states Nss, a calculation method has been reported by taking into account interfacial oxide layer and ideality factor n in the current transport mechanism. The current–voltage (I–V) and capacitance–voltage (C–V) characteristics of MIS diodes are studied over a wide temperature range of 80–350 K. The effects of Rs, interfacial layer and Nss on I–V and C–V characteristics are investigated. The values of n were strongly temperature dependent and decreased with increasing temperature. The energy distribution of Nss was determined from the forward bias I–V characteristics by taking into account the bias dependence of the effective barrier height. The mean Nss estimated from I–V and C–V measurements decreased with increasing temperature. The Rs estimated from Cheung’s functions was strongly temperature dependent and decreased with increasing temperature. The I–V characteristics confirmed that the distribution of Nss, Rs and interfacial layer are important parameters that influence the electrical characteristics of MIS devices.

The role of interface states and series resistance on the I–V and C–V characteristics in Al/SnO2/p-Si Schottky diodes

The current transport mechanism in an MIS-tunnel diode has been studied by considering both the process of tunneling and the effect of pinholes in the insulating layer. It has been shown that in order to explain the experimental J - V characteristics of MIS-diodes, presence of a thin interfacial layer of thickness δ p within the pinholes should be considered. From an analysis of the tJ - V and C - V characteristics, a method has been suggested for the estimation of the value of δ p . The values of interface trap density and barrier height for the MOS-part of the diodes are also calculated. The dependence of barrier height on oxide thickness for the diodes is found to obey the barrier height model of Cowley and Sze.

On the current transport mechanism in a metal—insulator—semiconductor (MIS) diode

This work presents an attempt related to the charging behaviour of interface states to the nonideal forward bias current-voltage (I-V) and the reverse bias capacitance-voltage (C-V) characteristics of AlnSi Schottky barrier diodes. The diode showed nonideal I-V behaviour with an ideality factor of 1.50 and was thought to have a metal-interface layer-semiconductor configuration. Considering that the interface states localized at the interfacial layer-semiconductor interface are in equilibrium with the semiconductor, the energy distribution of the interface states was exactly determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height, θe. The determination of the intercept voltage and interface state density was made by means of a simple interface charge model which has been developed in detail. The I-V characteristics were used for determining the voltage dependence of the barrier height. Although the change in barrier height with applied biasis small, it is important for exactly determining the shape of the interface state density distribution curve. At a frequency of 500 kHz, the nonlinear reverse bias C−2−V plot with the curvature concave downward has been only thought of to be due to the contribution of the capacitance of the interface state charges. It is concluded that the nonlinear nature of C−2−V plots in the frequency range 50–200 kHz has been caused by the interface state charges as well as inversion layer and inversion layer charges. It has been understood by means of the interface state charge model that the C−2−V plots cannot only be interpreted in terms of the contribution of the interface state charges to the device capacitance.

Interpreting the nonideal reverse bias c-v characteristics and importance of the dependence of schottky-barrier height on applied voltage

The role of discrete localized states on the current-voltage characteristics of metal-semiconductor contact is examined. It is seen that, because of these localized states, the logarithmic current vs voltage characteristics become nonlinear. Such nonlinearity is found sensitive to the temperature, and the energy and density of the localized states. The predicted temperature dependence of barrier height and the current-voltage characteristics are in agreement with the experimental results of Aboelfotoh [ Phys. Rev. B 39, 5070 (1989)].

Effect of localized states on the current-voltage characteristics of metal-semiconductor contacts with thin interfacial layer

The electrical characteristics of Schottky barrier diodes were studied considering the effect of shunt resistance. Both the DC and the AC behaviour of the device were investigated. It was found that the shunt resistance has a remarkable effect at low bias in contrast to the series resistance which influences the electrical characteristics at large bias. The standard evaluation techniques based on the DC characteristics are found to be inaccurate in the presence of the shunt resistance. Also, the AC conductance and capacitance of the device are significantly influenced, making our previously developed model limited in the presence of a shunt resistance. The well-known conductance and capacitance techniques for the characterization of these devices seem to be inapplicable at low bias because of the above-mentioned parasitic effect.

https://iopscience.iop.org/article/10.1088/0022-3727/29/3/047/pdf

The effect of shunt resistance on the electrical characteristics of Schottky barrier diodes

A capacitance technique to determine the interface state density of metal—semiconductor contact is developed which takes care of interfacial oxide layer and series resistance of the device. The technique is applied to Pt- and Co-nSi contacts, and the energy distributions of interface state density are determined. For both devices, the distribution is found to be initially flat, then increasing sharply with energy.

Capacitance technique for the determination of interface state density of metal-semiconductor contact

The free surface potential of a semiconductor has been studied by using a generalised definition of “neutral level.” Following this definition, an expression for the barrier height of an MIS structure has been derived, from which the expression for barrier height as derived by Cowley and Sze follows as a special case. Lastly, the formula used by previous workers for the determination of neutral level, has been modified for a more accurate calculation of the said parameter.

On the barrier height of a metal-semiconductor contact with a thin interfacial layer

An exponential distribution of deep level impurities has been considered to evaluate the current and capacitance of MIS diode with special reference to recombination effect modified for distributed defects. The dc current and conductance of the device have been found to vary non-linearly in logarithmic scale mainly because of recombination at lower voltages. Likewise, the capacitance of the device is also influenced due to the presence of exponentially distributed defects. The investigation reveals a distinct non-linearity in the 1/ C 2 vs. V characteristics with concavity upward or downward determined by the parametric values of the defects. The nature of variation of I – V and C – V characteristics have been found much sensitive to the parameters controlling the defect distribution.

P. Chattopadhyay

Papers

Effect of localized states on the current-voltage characteristics of metal-semiconductor contacts with thin interfacial layer

The effect of shunt resistance on the electrical characteristics of Schottky barrier diodes

Capacitance technique for the determination of interface state density of metal-semiconductor contact

On the barrier height of a metal-semiconductor contact with a thin interfacial layer

Effect of exponentially distributed deep levels on the current and capacitance of a MIS diode