This paper describes new techniques for the simulation and power distribution synthesis of mixed analog/digital integrated circuits considering the parasitic coupling of noise through the common substrate. By spatially discretizing a simplified form of Maxwell's equations, a three-dimensional linear mesh model of the substrate is developed. For simulation, a macromodel of the fine substrate mesh is formulated and a modified version of SPICE3 is used to simulate the electrical circuit coupled with the macromodel. For synthesis, a coarse substrate mesh, and interconnect models are used to couple linear macromodels of circuit functional blocks. Asymptotic Waveform Evaluation (AWE) is used to evaluate the electrical behavior of the network at every iteration in the synthesis process. Macromodel simulations are significantly faster than device level simulations and compare accurately to measured results. Synthesis results demonstrate the critical need to constrain substrate noise and simultaneously optimize power bus geometry and pad assignment to meet performance targets. >

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Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis

A CMOS /spl Sigma//spl Delta/ modulator for speech coding with continuous-time loopfilter is presented. Compared to switched-capacitor implementations, the relaxed bandwidth requirements of the active elements of the loopfilter reduce the power consumption. Furthermore, the need for an antialiasing filter at the modulator input is eliminated. A fourth-order, 64/spl times/ oversampling /spl Sigma//spl Delta/ modulator for application in portable telephones was designed and shows 80 dB dynamic range over the 300-3400 Hz voice bandwidth. Its input is directly connected to the microphone (maximum 40 mV/sub RMS/). Total harmonic distortion (THD) is below -70 dB at 95 /spl mu/A current consumption from a 2.2 V supply voltage. The active die area of the modulator is 0.5 mm/sup 2/ in a standard 0.5-/spl mu/m CMOS process.

A 0.2 mW CMOS /spl Sigma//spl Delta/ modulator for speech coding with 80 dB dynamic range

Oversampling digital-to-analog (D/A) converters employing sigma-delta modulation noise shaping and single-bit quantization are attractive for use in digital audio applications because of their relaxed reconstruction filtering requirements and their tolerance of component mismatch. However, the use of a two-level D/A interface results in a large amount of out-of-band quantization noise that typically must be attenuated by a carefully designed analog reconstruction filter. This paper introduces a means of simplifying the reconstruction filter design through the use of a semidigital finite-impulse-response (FIR) filter. In particular, it describes an oversampling D/A converter wherein a current-mode semidigital reconstruction filter is used to implement a multilevel D/A interface that attenuates the out-of-band quantization noise without requiring precise component matching. An experimental implementation of the converter achieves a dynamic range of 94 dB and 72 dB attenuation of out-of-band quantization noise for a baseband of 20 kHz. The prototype converter, which consists of a linear interpolator, a second-order noise shaper, and a 128-tap semidigital FIR filter, dissipates 59 mW from a 5-V supply and occupies an active area of 3 mm/sup 2/ when integrated in a 1.2- mu m digital CMOS technology. >

A CMOS oversampling D/A converter with a current-mode semi-digital reconstruction filter

The design of an analog-to-digital converter or digital-to-analog converter is one of the most fascinating tasks in micro-electronics. In a converter the analog world with all its intricacies meets the realm of the formal digital abstraction. Both disciplines must be understood for an optimum conversion solution. In a converter also system challenges meet technology opportunities. Modern systems rely on analog-to-digital converters as an essential part of the complex chain to access the physical world. And processors need the ultimate performance of digital-to-analog converters to present the results of their complex algorithms. The same progress in CMOS technology that enables these VLSI digital systems creates new challenges for analog-to-digital converters: lower signal swings, less power and variability issues. Last but not least, the analog-to-digital converter must follow the cost reduction trend. These changing boundary conditions require micro-electronics engineers to consider their design choices for every new design. Analog-to-Digital Conversion discusses the different analog-to-digital conversion principles: sampling, quantization, reference generation, nyquist architectures and sigma-delta modulation. Analog-to-Digital Conversion presents an overview of the state-of-the-art in this field and focuses on issues of optimizing accuracy and speed while reducing the power level. A lot of background knowledge and practical tips complement the discussion of basic principles, which makes Analog-to-Digital Conversion also a reference for the experienced engineer.

Analog-to-Digital Conversion

CMOS folded source-coupled logic (FSCL) uses a smaller logic voltage swing ( Delta V/sub L/ approximately=0.2 V/sub dd/) than conventional static logic and achieves a smaller power-delay product at high operating frequencies. By using current-steering techniques in fully-differential FSCL circuits to maintain a constant power supply current, digital switching noise is reduced by 30-300 times compared to conventional CMOS static logic. Measured results are presented for FSCL gates fabricated in a 2- mu m CMOS process, and simulated results with a standard 1- mu m process are used to compare the power, delay, and switching noise characteristics of FSCL and static logic with 5.0-, 3.3-, and 2.0-V power supplies. >

Folded source-coupled logic vs. CMOS static logic for low-noise mixed-signal ICs

A two-channel differential 18-b bit-stream digital-to-analog converter implemented in a 2.5- mu m BiCMOS process with 7.3-mm/sup 2/ chip area is described. The circuit contains two identical 1-b D-to-A conversion channels on one single chip. Each channel consists of a digital input part, a switched-capacitor D-to-A network, and two high-performance operational amplifiers. Total harmonic distortion plus noise is better than -102 dB. The dynamic range is more than 108 dB, giving a true 18-b resolution. Output operational-amplifier distortion is below 120 dB at full-scale signal. System design considerations, implementation, and measured results of the IC are discussed. >

A bit-stream digital-to-analog converter with 18-b resolution

A technique is presented for deriving all of the different control signals needed for focusing and radial tracking in a digital servosystem for compact disc (CD) players, as well as the full band data from the disc. Because of the different natures of all those signals, different bandwidth and dynamic range, complex analog anti-aliasing circuits, and several types of A/D (analog-to-digital) converters would normally be required to convert the signals from the analog to digital domain. With the proposed technique it is possible to carry out the conversion of the high-frequency data as well as the low-frequency control signals with only a single type of multibit sigma-delta ( Sigma Delta ) A/D converter in combination with digital signal processing. The use of Sigma Delta type A/D conversion also has other advantages such as its suitability for integration in a CMOS VLSI process and the fact that the requirements for the anti-aliasing filters in front of the converters are relaxed due to the oversampling technique. >

P.J.A. Naus

Papers

A bit-stream digital-to-analog converter with 18-b resolution

Multibit oversampled Sigma Delta A/D converters as front end for CD players