P
Per Stenström
Researcher at Chalmers University of Technology
Publications - 251
Citations - 8514
Per Stenström is an academic researcher from Chalmers University of Technology. The author has contributed to research in topics: Cache & Cache coherence. The author has an hindex of 43, co-authored 245 publications receiving 8193 citations. Previous affiliations of Per Stenström include Stanford University & Ericsson.
Papers
More filters
Proceedings ArticleDOI
Relative performance of hardware and software-only directory protocols under latency tolerating and reducing techniques
Håkan Grahn,Per Stenström +1 more
TL;DR: It is found that prefetching can degrade the performance of software-only directory protocols due to useless prefetches and latency tolerating techniques for software- only directory protocols must be chosen with more care than for hardware-only Directory protocols.
Proceedings Article
Modelling accesses to stationary data in a shared memory multiprocessor
Mats Brorsson,Per Stenström +1 more
TL;DR: It is shown that the relationship between a particular access pattern anCache misses due to coherence and directory maintenance is a major reason for poor performance in shared memory multiprocessors.
Journal ArticleDOI
Applications for Shared Memory Multiprocessors
Per Stenström,Fredrik Dahlgren +1 more
Journal ArticleDOI
SimWattch and learn
TL;DR: SimWattch is introduced, a complete system simulation environment that can be used to conduct performance and power-oriented microarchitecture explorations or revisit existing techniques from a more complete perspective taking into account operating system interactions.