P
Péter Földesy
Researcher at Hungarian Academy of Sciences
Publications - 57
Citations - 602
Péter Földesy is an academic researcher from Hungarian Academy of Sciences. The author has contributed to research in topics: CMOS & Chip. The author has an hindex of 11, co-authored 54 publications receiving 569 citations. Previous affiliations of Péter Földesy include Spanish National Research Council & Pázmány Péter Catholic University.
Papers
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Journal ArticleDOI
A 0.8-/spl mu/m CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage
Rafael Domínguez-Castro,Servando Espejo,Ángel Rodríguez-Vázquez,Ricardo Carmona,Péter Földesy,Ákos Zarándy,Péter Szolgay,Tamás Szirányi,Tamás Roska +8 more
TL;DR: A CMOS chip for the parallel acquisition and concurrent analog processing of two-dimensional (2-D) binary images, based on the cellular neural/nonlinear network universal machine, which features 2-/spl mu/s operation speed and around 7-b accuracy in the analog processing operations.
Journal ArticleDOI
The computational infrastructure of analogic CNN computing. I. The CNN-UM chip prototyping system
TL;DR: The main goal was to provide easy-to-use tools and hardware interfacing elements and putting most of the sophistication in the chips and chip sets.
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The new framework of applications: the Aladdin system
TL;DR: One of the most important features of the Aladdin system is the image processing library, which reduces algorithm development time, provides efficient codes, error free operation in binary, and accurate operation in grayscale nodes.
Journal ArticleDOI
Fault-tolerant design of analogic CNN templates and algorithms-Part I: The binary output case
TL;DR: This paper addresses the issue of designing a class of fault-tolerant cellular neural network (CNN) templates that, combined with CNN analogic algorithms, work correctly and reliably on given CNN universal machine (CNN-UM) chips and proposes a generic method for finding nonpropagating binary-output CNN templates.
Journal ArticleDOI
Digital implementation of cellular sensor-computers
Péter Földesy,Péter Földesy,Ákos Zarándy,Ákos Zarándy,Csaba Rekeczky,Csaba Rekeczky,Tamás Roska,Tamás Roska +7 more
TL;DR: It is found that on or below 0.18 µm technology the digital implementation of the cellular sensor‐computer is a viable alternative to the analogue versions in general‐purpose designs.