An experimental technique is described for observing the effects of switching transients in digital MOS circuits that perturb analog circuits integrated on the same die by means of coupling through the substrate Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprising an epitaxial layer grown on a heavily doped bulk wafer Observations indicate that reducing the inductance in the substrate bias is the most effective Device simulations are used to show how crosstalk propagates via the heavily doped bulk and to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry A method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates is developed >

Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits

IEEE International Solid-State Circuits Conference

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Design Of Integrated Circuits For Optical Communications

Analog-Digital (A/D) converters used in instrumentation and measurements often require high absolute accuracy, including very high linearity and negligible dc offset. The realization of high-resolution Nyquist-rate converters becomes very expensive when the resolution exceeds 16 bits. The conventional delta-sigma (/spl Delta//spl Sigma/) structures used in telecommunication and audio applications usually cannot satisfy the requirements of high absolute accuracy and very small offset. The incremental (or integrating) converter provides a solution for such measurement applications, as it has most advantages of the /spl Delta//spl Sigma/ converter, yet is capable of offset-free and accurate conversion. In this paper, theoretical and practical aspects of higher order incremental converters are discussed. The operating principles, topologies, specialized digital filter design methods, and circuit level issues are all addressed. It is shown how speed, resolution, and A/D complexity can be optimized for a given design, and how with some special digital filters improved speed/resolution ratio can be achieved. The theoretical results are verified by showing design examples and simulation results.

Theory and applications of incremental /spl Delta//spl Sigma/ converters

This paper presents a tutorial overview of ΣΔ modulators, their operating principles and architectures, circuit errors and models, design methods, and practical issues. A review of the state of the art on nanometer CMOS implementations is described, giving a survey of cutting-edge ΣΔ architectures, with emphasis on their application to the next generation of wireless telecom systems.

Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey

In this paper, we describe the system architecture and prototype measurements of a MEMS gyroscope system with a resolution of 0.025deg/s/ radic(Hz). The architecture makes extensive use of control loops, which are mostly in the digital domain. For the primary mode both the amplitude and the resonance frequency are tracked and controlled. The secondary mode readout is based on unconstrained SigmaDelta force-feedback, which does not require a compensation filter in the loop and thus allows more beneficial quantization noise shaping than prior designs of the same order. Due to the force-feedback, the gyroscope has ample dynamic range to correct the quadrature error in the digital domain. The largely digital setup also gives a lot of flexibility in characterization and testing, where system identification techniques have been used to characterize the sensors. This way, a parasitic direct electrical coupling between actuation and readout of the mass-spring systems was estimated and corrected in the digital domain. Special care is also given to the capacitive readout circuit, which operates in continuous time.

/pdf/a-closed-loop-digitally-controlled-mems-gyroscope-with-1t16dkc5r2.pdf

A Closed-Loop Digitally Controlled MEMS Gyroscope With Unconstrained Sigma-Delta Force-Feedback

This work presents a study of the extended counting technique for a 1.2-V micropower voice-band A/D converter. This extended counting technique is a blend of /spl Sigma//spl Delta/ modulation with its high resolution but relatively low speed and algorithmic conversion with its higher speed but lower accuracy. To achieve this, the converter successively operates first as a first-order /spl Sigma//spl Delta/ modulator to convert the most significant bits, and then the same hardware is used as an algorithmic converter to convert the remaining least significant bits. An experimental prototype was designed in 0.8-/spl mu/m CMOS. With a 1.2-V power supply, it consumes 150 /spl mu/W of power at a 16-kHz Nyquist sampling frequency. The measured peak S/(N+THD) was 80 dB and the dynamic range 82 dB. The converter core including the controller and all reconstruction logic occupies about 1.3/spl times/1 mm/sup 2/ of chip area. This is considerably less than a complete /spl Sigma//spl Delta/ modulation A/D converter where the digital decimation filter would occupy a significant amount of chip area.

A 13.5-b 1.2-V micropower extended counting A/D converter

This paper presents the architectural concept and implementation of a mostly digital voltage-controlled oscillator-analog-to-digital converter (VCO-ADC) with third-order quantization noise shaping. The system is based on the combination of a VCO and a digital counter. It is shown how this combination can function as a continuous-time integrator to form a high-order continuous-time sigma–delta modulator (CT-SDM). The counter consists only of digital building blocks, and the VCOs are implemented using ring oscillators, which are also digital-friendly. No traditional analog blocks, such as opamps, OTAs, or comparators, are used. As a proof of concept, we have implemented a third-order VCO-based CT-SDM for a 10-MHz bandwidth in the low-power version of a 65-nm CMOS technology. This prototype shows a measured performance of 71/66.2/62.5-dB DR/SNR/SNDR at a 10-MHz bandwidth while consuming 1.8 mW from a 1.0-V analog and 1.9 mW from a 1.2-V digital supply. With digital calibration, the nonlinearity could be pushed below the noise level, leading to an improved peak SNDR of 66 dB.

A Mostly Digital VCO-Based CT-SDM With Third-Order Noise Shaping

Extended-counting analog-to-digital conversion combines the accuracy of /spl Sigma//spl Delta/ modulation with the speed of algorithmic conversion. In this paper, a double-sampling technique is introduced for this type of converter. It is based on a variant of the fully floating bilinear integrator. This way, the clock frequency of the converter is almost halved. An experimental converter was designed in a 0.6-/spl mu/m CMOS technology for a bandwidth of 500 kHz at a 3.3-V supply. In the switched-capacitor implementation, the hardware is extensively reused. This way, the converter can be realized with only one operational amplifier. On the other hand, compared to alternative implementations, the amount of switches is increased. These are designed carefully in order not to degrade the performance. The converter converts a sample in 24 clock cycles and achieves a dynamic range of 87 dB. The peak signal-to-noise ratio (SNR) and signal-to-noise-plus-distortion ratio (SNDR) were measured to be 82 and 81 dB, respectively. The power consumption was 28-mW analog and 20-mW digital. The converter core occupies 0.7 mm/sup 2/ including digital logic.

A double-sampling extended-counting ADC

A very simple ring-oscillator voltage-controlled oscillator (VCO) structure for use in VCO-ADC applications is presented. It has a greatly improved linearity compared with previously published VCOs. Measurement results of a 1 V, 65 nm CMOS prototype confirm the effectiveness of the proposed approach.

/pdf/highly-linear-vco-for-use-in-vco-adcs-22amay8zat.pdf

Pieter Rombouts

Papers

A Closed-Loop Digitally Controlled MEMS Gyroscope With Unconstrained Sigma-Delta Force-Feedback

A 13.5-b 1.2-V micropower extended counting A/D converter

A Mostly Digital VCO-Based CT-SDM With Third-Order Noise Shaping

A double-sampling extended-counting ADC

Highly linear VCO for use in VCO-ADCs