An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.

Tri-gate devices and methods of fabrication

A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor body. A gate electrode is then formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the first and second laterally opposite sidewalls of the semiconductor body. The gate electrode comprises a metal film formed directly adjacent to the gate dielectric layer. A pair of source and drain regions are then formed in the semiconductor body on opposite sides of the gate electrode.

Nonplanar transistors with metal gate electrodes

A method for forming semiconductor contacts comprises forming a germanium fin structure over a silicon substrate, depositing a doped amorphous silicon layer over the first drain/source region and the second drain/source region at a first temperature, wherein the first temperature is lower than a melting point of the germanium fin structure and performing a solid phase epitaxial regrowth process on the amorphous silicon layer at a second temperature, wherein the second temperature is lower than the melting point of the germanium fin structure.

Apparatus and method for forming semiconductor contacts

Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.

Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication

A strained Fin Field Effect Transistor (FinFET) (and method for forming the same) includes a relaxed first material having a sidewall, and a strained second material formed on the sidewall of the first material. The relaxed first material and the strained second material form a fin of the FinFET.

High performance strained silicon finfets device and method for forming same

A silicon and silicon germanium based semiconductor MODFET device design and method of manufacture. The MODFET design includes a high-mobility layer structure capable of ultra high-speed, low-noise for a variety of communication applications including RF, microwave, sub-millimeter-wave and millimeter-wave. The epitaxial field effect transistor layer structure includes critical (vertical and lateral) device scaling and layer structure design for a high mobility strained n-channel and p-channel transistor incorporating silicon and silicon germanium layers to form the optimum modulation-doped heterostructure on an ultra thin SOI or SGOI substrate capable of achieving greatly improved RF performance.

Ultra high-speed Si/SiGe modulation-doped field effect transistors on ultra thin SOI/SGOI substrate

A structure and method of fabricating a high-mobility semiconductor layer structure and field-effect transistor (MODFET) that includes a high-mobility conducting channel, while at the same time, maintaining counter doping to control deleterious short-channel effects. The MODFET design includes a high-mobility conducting channel layer wherein the method allows the counter doping to be formed using a standard technique such as ion implantation, and further allows the high-mobility channel to be in close proximity to the counter doping without degradation of the mobility.

Structure for and method of fabricating a high-mobility field-effect transistor

A semiconductor structure and a method for fabricating the semiconductor structure include a semiconductor substrate having a cross-section hourglass shaped channel region. A stress imparting layer is located adjacent the channel region. The hourglass shape may provide for enhanced vertical tensile stress within the channel region when it is longitudinally compressive stressed by the stress imparting layer.

Cross-section hourglass shaped channel region for charge carrier mobility modification

A method for manufacturing a fin field-effect transistor (FinFET) device, comprises forming a plurality of fins on a substrate to a first thickness, forming a sacrificial gate stack on portions of the fins, forming source drain junctions using ion implantation, forming a dielectric layer on the substrate, removing the sacrificial gate stack to expose the portions of the fins, thinning the exposed portions of the fins to a second thickness less than the first thickness, and forming a gate stack on the thinned exposed portions of the fins to replace the removed sacrificial gate stack.

Qiqing C. Ouyang

Papers

High performance strained silicon finfets device and method for forming same

Ultra high-speed Si/SiGe modulation-doped field effect transistors on ultra thin SOI/SGOI substrate

Structure for and method of fabricating a high-mobility field-effect transistor

Cross-section hourglass shaped channel region for charge carrier mobility modification

FinFET DEVICE INCLUDING FINS HAVING A SMALLER THICKNESS IN A CHANNEL REGION, AND A METHOD OF MANUFACTURING SAME