Coupled inductors can create multiple resonant frequencies in a compact high-order resonator. Together with proper nonlinear active circuitry, such a high-order resonator realizes a multi-mode oscillator covering a wide frequency range. Compared with conventional switched-resonator-based approaches that consume the same chip area, the proposed coupled-inductor-based resonator results in larger quality-factor, and hence, lower oscillator phase noise. In the proposed multi-mode oscillator that uses the multi-port coupled inductors, mode switching is achieved using independent active cores without using lossy switches in the resonator path. The behavior of the multi-mode resonator as a multi-port network in an oscillator, design trade-offs, and switching transient response of the multi-mode oscillator have been studied analytically. As a proof of concept, an integrated voltage-controlled oscillator (VCO) with a 1.28-6.06 GHz tuning range is designed and fabricated in a 0.13 mum CMOS technology. The triple-mode VCO uses a sixth-order resonator based on three coupled inductors with a compact common-centric layout. Depending on the oscillation frequency, the VCO current consumption is automatically adjusted from 2.9 to 6.1 mA to achieve a low phase noise throughout the frequency range. The measured phase noises at 1 MHz offset from carrier frequencies of 1.76, 2.26, 3.3, 4.5, and 5.6 GHz are -119.3 , -120.15 , -118.1 , -117 , and -113.5 dBc/Hz , respectively. The chip area, including the pads, is 1 mm times 1 mm and the supply voltage is 1.5 V.

Wideband Multi-Mode CMOS VCO Design Using Coupled Inductors

This work presents complete analysis of both one- port and two-port dual-band oscillators using transformer-based fourth-order LC tanks, from which critical parameters including oscillation frequency, start-up condition, tank Q, phase noise-are thoroughly derived and compared. It is shown that one-port oscillators consume less power than two-port counterparts but may suffer from stability problem which can be solved by a notch-peak cancellation technique. On the other hand, compared to one-port oscillators, two-port oscillators need to consume more power to obtain the same output swing, but their phase noise can be improved more linearly with increasing bias current, and thus they can achieve lower phase noise with a sufficiently large bias current. Based on the results, a dual-band quadrature voltage- controlled oscillator (Q-VCO) is systematically designed and implemented in a 0.13- m CMOS process for software-defined -radio (SDR) applications, in which the two-port topology is used in the low band for low phase noise and the one-port topology is employed in the high band for low power consumption. The prototype achieves a dual-band operation with in-phase and quadrature-phase (IQ) output signals from 2.7 GHz to 4.3 GHz and from 8.4 GHz to 12.4 GHz. At 3.6 GHz and 10.4 GHz, phase noise at 3 MHz offset of dBc/Hz and dBc/Hz and sideband-rejection ratios (SBR) of 37 dB and 41 dB are measured, respectively.

Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios

A new fully integrated, dual-band CMOS voltage controlled oscillator (VCO) is presented. The VCO is composed of n-core cross-coupled Colpitts VCOs and was implemented in 0.18 mum CMOS technology with 0.8 V supply voltage. The circuit allows the VCO to operate at two resonant frequencies with a common LC tank. The VCO has two control inputs, one for continuous control of the output frequency and one for band switching. This VCO is configured with 5 GHz and 12 GHz frequency bands with differential outputs. The dual-band VCO operates in 4.78-5.19 GHz and 12.19-12.61 GHz. The phase noises of the VCO operating at 5.11 and 12.2 GHz are -117.16 dBc/Hz and -112.15 dBc/Hz at 1 MHz offset, respectively, while the VCO draws 3.2/2.72 mA and 2.56/2.18 mW consumption at low/high frequency band from a 0.8 V supply.

A Dual-Band CMOS Voltage-Controlled Oscillator Implemented With Dual-Resonance LC Tank

As CMOS scales down and grows more expensive, area-aware RF front-end design becomes appropriate. A wideband front-end is presented that uses an inductorless LNA and downconversion section up to 6 GHz. Frequency synthesis is realized using a single-inductor dual-band 3.5 and -10 GHz VCO. In-depth analysis describes the operation of the 4-port oscillator, and compares phase noise to that of a classical VCO. The front-end is realized in 90 nm digital CMOS. The LNA achieves a noise figure of 2.7 dB with an average IIP3 of -2 dBm. The dual-band VCO achieves a phase noise of -122 dBc/Hz and -128 dBc/Hz at 3.9 GHz and 10 GHz, respectively, at 2.5 MHz offset. Both circuits are embedded in a wideband direct-conversion front-end consuming less than 60 mW from a 1.2 V supply.

A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS

In this paper, we present a distributed dual-band LC oscillator suitable for low-phase-noise applications. It switches between the odd and even resonant modes of a fourth-order LC resonator. In contrast to other switched-resonator designs, the switches used for mode selection do not carry current, and therefore, do not affect the quality factor of the resonator, which leads to low phase noise. Analysis shows it achieves the same phase-noise figure-of-merit (FoM) as a single-band LC oscillator that uses the same inductor and active core. This was verified by a prototype in a 0.13-μm CMOS process. It draws a current of 4 mA from a 0.5-V power supply and achieves a FoM of 194.5 dB at the 4.9-GHz band and 193.0 dB at the 6.6-GHz band, which is the same as the reference standalone LC oscillator. There is good agreement among theory, simulation, and measurement results.

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A Distributed Dual-Band LC Oscillator Based on Mode Switching

A dual-band LC voltage-controlled oscillator (VCO) architecture suitable for GSM/PCS/DCS applications is presented. The VCO utilizes a fourth-order resonance tank and avoids quality-factor-deteriorating switches. The paper outlines the design tradeoffs and the VCO when using a fourth-order resonator. The 0.8-GHz/1.8-GHz test chip was fabricated in the 0.5-mum IBM-5AM SiGe process and has achieved phase noise of -134 dBc/Hz at a 1-MHz frequency offset from the carrier, with 56-MHz and 121-MHz tuning ranges in the corresponding bands. The VCO core consumes 15 mW from a 2.5-V power supply

Dual-Band LC VCO Architecture With a Fourth-Order Resonator

This paper proposes a two-phase self-assisted zero-voltage switching (ZVS) converter suitable for fully monolithic implementation. The proposed topology utilizes an auxiliary inductor connected between the two branches of a two-phase converter to achieve ZVS conditions. The proposed converter helps reduce the output voltage ripples of the standard ZVS topology. Furthermore, the auxiliary inductor could be magnetically coupled with the filtering inductor to reduce the occupied silicon area. The advantages of the proposed converter are validated through simulations on a 65-nm CMOS process.

Two-Phase Self-Assisted Zero-Voltage Switching DC–DC Converter

Time-varying root-locus of a large-signal LC oscillator is obtained via semi-symbolic analysis, where the complex frequency s is a symbol. The steady-state circuit behavior is modeled by its time-varying small-signal admittance matrix within one oscillation period. The roots of the characteristic equation are computed with the QZ method. The time-varying root-locus analysis capabilities are demonstrated on a GHz range 130 nm complementary metal-oxide-semiconductor cross-coupled LC oscillator, and they complement the results obtained with the traditional numerical computer-aided design methods.

Time-Varying Root-Locus of Large-Signal LC Oscillators

A theoretical analysis of the constraints posed by a tapped inductor on a dual-band fourth-order voltage-controlled oscillator (VCO) is presented. The analysis provides guidelines for frequency band selection, tapped-inductor design, and VCO optimization. The guidelines are utilized in a VCO design example simulated on a 45-nm CMOS process. An adaptive frequency-tuning scheme exploits unique features of the fourth-order tank to optimize VCO performance.

Design Considerations in Tapped-Inductor Fourth-Order Dual-Band VCO

SUMMARY

This paper presents a comprehensive comparison between complementary metal-oxide-semiconductor (CMOS) LC-oscillator topologies often used in GHz-range transceivers. The comparison utilizes the time-varying root-locus (TVRL) method to add new insights into the operation of different oscillators. The paper focuses on the treatment of the TVRL trajectories obtained for different oscillators and establishes links between the trajectories and physical phenomena in oscillators. The evaluation of the root trajectories shows the advantages of the TVRL method for comparing oscillator topologies, which is also extended towards the analysis of voltage-controlled oscillators. The necessary circuit simplifications required in closed-form root-locus analysis are avoided by the TVRL, which allows precise oscillator comparison and reveals details on the topology specifics. The derived conclusions have been verified by the Cadence Spectre-RF simulator on 130-nm CMOS process. Copyright © 2011 John Wiley & Sons, Ltd.

S. S. Broussev

Papers

Dual-Band LC VCO Architecture With a Fourth-Order Resonator

Two-Phase Self-Assisted Zero-Voltage Switching DC–DC Converter

Time-Varying Root-Locus of Large-Signal LC Oscillators

Design Considerations in Tapped-Inductor Fourth-Order Dual-Band VCO

Evaluation and comparison of GHz‐range LC oscillators using time‐varying root‐locus