Physical limitations for CMOS technology have provided the way for manufacturing the quantum cellular automata technology-based hardware elements at Nano level. From the purpose of very high speed, area and low power consumption, this Nanotechnology has been taken into consideration. Improving their structures will lead promoting the system performance completely, because the Full adders are assumed as major and primary component of computational processors. In current study, the new layout of all single bit full adders in the quantum cellular automata's technology is introduced. In comparison with existing schemes, the suggested circuit has fewer cells and smaller area.

A new quantum-dot cellular automata full-adder

Novel high-performance ternary circuits for nanotechnology are presented here. Each of these carbon nanotube field-effect transistor (CNFET)-based circuits implements all the possible kinds of ternary logic, including negative, positive and standard ternary logics, in one structure. The proposed designs have good driving capability and large noise margins and are robust. These circuits are designed based on the unique properties of CNFETs, such as the capability of setting the desired threshold voltage by changing the diameters of the nanotubes. This property of CNFETs makes them very suitable for the multiple- V t design method. The proposed circuits are simulated exhaustively, using Synopsys HSPICE with 32 nm-CNFET technology in various test situations and different supply voltages. Simulation results demonstrate great improvements in terms of speed, power consumption and insusceptibility to process variations with respect to other conventional and state-of-the-art 32 nm complementary metal-oxide semiconductor and CNFET-based ternary circuits. For instance at 0.9 V, the proposed ternary logic and arithmetic circuits consume on average 53 and 40 less energy, respectively, compared to the CNFET-based ternary logic and arithmetic circuits, recently proposed in the literature.

Design of energy-efficient and robust ternary circuits for nanotechnology

Designing efficient QCA logical circuits with power dissipation analysis

Design and evaluation of new majority gate-based RAM cell in quantum-dot cellular automata

New robust QCA D flip flop and memory structures

Designing Reconfigurable Quantum-Dot Cellular Automata Logic Circuits

Quantum dot cellular automata (QCA) technology is considered as one of the most suitable replacements to reduce the CMOS-based digital circuit design problems at the nanoscale due to its tiny size, fast, latency and very low power consumption. One of the main components of microprocessors is the arithmetic logic unit (ALU) and in other words, it acts as the heart of microprocessors. This paper presents a QCA technology-based reversible ALU unit using basic reversible blocks and a novel reversible block namely BS1 Block. The proposed block performs logic and arithmetic operations in the proposed scheme. The simulations of the proposed design are carried out by QCA Designer. According to the simulated results, the proposed structure has a 35%, 27% and 30% improvement in quantum cost, the number of cells and the occupied area in comparison to the previous conducted researches, respectively.

Novel design and simulation of reversible ALU in quantum dot cellular automata

A Quantum Cellular Automaton (QCA) is a nanotechnology which is an attractive alternative for transistor based technologies in the near future. A new seven input majority gate in quantum dot cellular automata is proposed in this paper. The basic elements in QCA are majority and inverter gates, therefore using a majority gate with more inputs in QCA circuit will cause reduction in cell count, latency and complexity. Furthermore, by using the proposed seven input majority gate we can design four inputs AND gate and OR gate in only two clock phases. By applying these kinds of gates QCA circuits could be simplified and optimized. In order to prove the functionality of the proposed device, QCADesigner tool and some physical proofs are utilized.

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A Novel Seven Input Majority Gate in Quantum-dot Cellular Automata

Design of Efficient and Testable n-Input Logic Gates in Quantum-Dot Cellular Automata

Due to low power dissipation in computing, reversible logic is an attractive field of research in quantum and optical computing. Since the conventional CMOS technology cannot be used for implementing reversible gates owing to its high power dissipation, employing novel technologies such as nano-scale ones are being deployed. In this paper we utilize Quantum-dot Cellular Automata (QCA) as a candidate technology for implementing reversible logic gates. This paper presents a new realization approach to reversible logic based on majority gates (MGs) and a new reversible gate is proposed as well. The gate will be compared with an existing MG-based structure in terms of delay, complexity and area. The results show that even though our gate requires more cells, it returns the outputs in less clock cycles and hence the design is faster.

Samira Sayedsalehi

Papers

Designing Reconfigurable Quantum-Dot Cellular Automata Logic Circuits

Novel design and simulation of reversible ALU in quantum dot cellular automata

A Novel Seven Input Majority Gate in Quantum-dot Cellular Automata

Design of Efficient and Testable n-Input Logic Gates in Quantum-Dot Cellular Automata

Implementation of reversible logic design in nanoelectronics on basis of majority gates